1 files changed, 219 insertions, 0 deletions
diff --git a/fdl/ch573/gpio.fdl b/fdl/ch573/gpio.fdl
new file mode 100644
index 0000000..c54d956
--- /dev/null
+++ b/fdl/ch573/gpio.fdl
@@ -0,0 +1,219 @@
+import "ch573/common.fdl";
+
+/** Package for */
+package ch573.gpio {
+
+  location sys_base = 0x4000_1000;
+  location gpio_base = 0x4000_1018;
+
+  location gpio_port_a_base = 0x4000_10A0;
+  location gpio_port_b_base = 0x4000_10C0;
+
+  using ch573.common;
+
+  bits pd_drv_t : enum(1) {
+    [[ c: unqualified ]]
+    PD_DRV_DRIVE = 0,
+
+    [[ c: unqualified ]]
+    PD_DRV_OPEN_DRAIN = 1,
+  };
+
+  /** Gpio port type. */
+  type gpio_port_t : struct {
+    /** Port direction register. */
+    reg (32) : struct {
+       dir : enum(1) {
+         [[ c: unqualified ]]
+         DIR_OUT = 1,
+
+         [[ c: unqualified ]]
+         DIR_IN = 0,
+       } [16];
+       reserved(16);
+    };
+
+    /** Pin input register. */
+    reg pin(32);
+
+    /** Pin output register. */
+    reg (32) : struct {
+      out : bit_t[16];
+      reserved(16);
+    };
+
+    /** Data reset register. */
+    reg clr(32);
+
+    /** Pull-up resistor configuration. */
+    reg pu(32);
+
+    /** pull-down/drive configuration register. */
+    reg (32) : struct {
+      pd_drv : pd_drv_t[16];
+      reserved(16);
+    };
+  };
+
+  /** Gpio Type. */
+  type gpio_t : struct {
+    /** Function pin remapping register. */
+    reg pin_alternate(16) : struct {
+      /** 
+       * TMR0 function pin mapping selection bit:
+       *
+       *  1: TMR0_/PWM0_/CAP0_ is mapped to PB[23]
+       *  0: TMR0_/PWM0_/CAP0_ is mapped to PA[9]
+       */
+      rw pin_tmr0 : bit_t;
+
+      /**
+       * TMR1 function pin mapping selection bit:
+       *
+       *  1: TMR1_/PWM1_/CAP1_ is mapped to PB[10];
+       *  0: TMR1/PWM1/CAP1 is mapped to PA[10].
+       */
+      rw pin_tmr1 : bit_t;
+
+      /**
+       * TMR2 function pin mapping selection bit:
+       *
+       *  1: TMR2_/PWM2_/CAP2_ is mapped to PB[11];
+       *  0: TMR2/PWM2/CAP2 is mapped to PA[11].
+       */
+      rw pin_tmr2 : bit_t;
+
+      reserved(1);
+
+      /**
+       * UART0 function pin mapping selection bit:
+       *
+       *  1: RXD0_/TXD0_ is mapped to PA[15]/PA[14];
+       *  0: RXD0/TXD0 is mapped to PB[4]/PB[7].
+       */
+      rw pin_uart0 : bit_t;
+
+      /**
+       * UART1 function pin mapping selection bit:
+       *
+       *  1: RXD1_/TXD1_ is mapped to PB[12]/PB[13];
+       *  0: RXD1/TXD1 is mapped to PA[8]/PA[9].
+       */
+      rw pin_uart1 : bit_t;
+
+      reserved(2);
+
+      /**
+       * SPI0 function pin mapping selection bit:
+       *
+       *  1: SCK0_/SCS_/MOSI_/MISO_ is mapped to PB[12]/PB[13]/PB[14]/PB[15];
+       *  0: SCK0/SCS/MOSI/MISO is mapped to PA[12]/PA[13]/PA[14]/PA[15].
+       */
+      rw pin_spi0 : bit_t;
+
+      reserved(7);
+
+    };
+
+    /** Peripheral analog pin configuration register. */
+    reg pin_analog_ie(16) : struct {
+      reserved(6);
+
+      pin_usb_dp_pu : bit_t;
+
+      /**
+       * USB pin enable:
+       *
+       *   1: PB10-11 are USB communication pins;
+       *   0: PB10-11 are not used for USB communication.
+       */
+      pin_usb_ie : bit_t;
+      
+      /**
+       * ADC/TKEY 8/9 channel pin digital input disable:
+       *
+       *   1: Disable PB0/PB6 digital input to save power consumption;
+       *   0: Enable digital input.
+       */
+      pin_adc8_9_ie : bit_t;
+
+      /**
+       * ADC/TKEY 0 channel pin digital input disable:
+       *
+       *   1: Disable PA4 digital input to save power consumption;
+       *   0: Enable digital input.
+       */
+      pin_adc0_ie : bit_t;
+
+      /**
+       * ADC/TKEY 1 channel pin digital input disable:
+       *
+       *   1: Disable PA5 digital input to save power consumption;
+       *   0: Enable digital input.
+       */
+      pin_adc1_ie : bit_t;
+      
+      /**
+       * ADC/TKEY 12 channel pin digital input disable:
+       *
+       *   1: Disable the PA8 digital input to save power consumption;
+       *   0: Enable digital input.
+       */
+      pin_adc12_ie : bit_t;
+
+      /**
+       * ADC/TKEY 13 channel pin digital input disable:
+       *
+       *   1: Disable PA9 digital input to save power consumption;
+       *   0: Enable digital input.
+       */
+      pin_adc13_ie : bit_t;
+
+      /**
+       * 32KHz crystal LSE pin digital input disable:
+       *
+       *   1: Disable PA10-11 digital input to save power consumption;
+       *   0: Enable digital input.
+       */
+      pin_xt32k_ie : bit_t;
+
+      /**
+       * ADC/TKEY 2/3 channel pin digital input disable:
+       *
+       *   1: Disable PA12-13 digital input to save power consumption;
+       *   0: Enable digital input.
+       */
+      pin_adc2_3_ie : bit_t;
+
+      /**
+       * ADC/TKEY 4/5 channel pin digital input disable:
+       *
+       *   1: Disable PA14-15 digital input to save power consumption;
+       *   0: Enable digital input.
+       */
+      pin_adc4_5_ie : bit_t;
+    };
+
+    /** Port A interrupt enable register. */
+    reg pa_interrupt_enable(16);
+
+    /** Port B interrupt enable register. */
+    reg pb_interrupt_enable(16);
+
+    /** Port A interrupt mode configure register. */
+    reg pa_interrupt_mode(16);
+
+    /** Port B interrupt mode configure register. */
+    reg pb_interrupt_mode(16);
+
+    /** Port A interrupt flag register. */
+    reg pa_interrupt_flag(16);
+
+    /** Port B interrupt flag register. */
+    reg pb_interrupt_flag(16);
+  };
+
+  instance gpio at gpio_base : gpio_t;
+  instance gpio_port_a at gpio_port_a_base : gpio_port_t;
+  instance gpio_port_b at gpio_port_b_base : gpio_port_t;
+};