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-rw-r--r--goal.fiddle92
1 files changed, 64 insertions, 28 deletions
diff --git a/goal.fiddle b/goal.fiddle
index b87f0e9..b59acb4 100644
--- a/goal.fiddle
+++ b/goal.fiddle
@@ -1,6 +1,7 @@
option endian little;
// package for the GPIO system.
+
package gpio {
location gpio_a_base = 0x4800_0000;
@@ -16,9 +17,9 @@ package gpio {
/**
* Structure of the GPIO port on an stm32l432
*/
- objtype gpio_t : {
+ type gpio_t : struct {
assert_pos(0);
- reg (32) : {
+ reg (32) : struct {
/** The mode for each pin. */
mode_r : enum(2) {
/** The GPIO pin is used for input. */
@@ -44,7 +45,7 @@ package gpio {
* The output type.
*/
assert_pos(0x04);
- reg ocfg_reg(32) : {
+ reg ocfg_reg(32) : struct {
otype_r : enum(1) {
/**
* The GPIO pin is capable of sinking to ground (for LOW) or providing
@@ -66,7 +67,7 @@ package gpio {
* Sets the speed of the provided GPIO pin.
*/
assert_pos(0x08);
- reg (32) : {
+ reg (32) : struct {
ospeed_r : enum(2) {
low = 0,
medium = 1,
@@ -79,16 +80,26 @@ package gpio {
* Pullup/Pulldown type
*/
assert_pos(0x0c);
- wo reg (32) : {
- pupd_r : enum(2) {
- none = 0b0,
- // Compiles to Gpio::PupdR::PullUp
- pull_up = 0b1,
- // Compiles to Gpio::PupdR::PullDown
- pull_down = 0b10,
- // Not used, but has to be included to fill out the enum.
- reserved = 0b11,
- } [16];
+ wo reg (32) : struct {
+ union {
+ pupd_r : enum(2) {
+ none = 0b0,
+ // Compiles to Gpio::PupdR::PullUp
+ pull_up = 0b1,
+ // Compiles to Gpio::PupdR::PullDown
+ pull_down = 0b10,
+ // Not used, but has to be included to fill out the enum.
+ reserved = 0b11,
+ } [16];
+
+ struct {
+ alternate : enum(1) {
+ enabled = 0,
+ disabled = 1,
+ } [16];
+ reserved(16);
+ };
+ };
};
/**
@@ -97,11 +108,26 @@ package gpio {
* Reading form the provided pin will yield high if the pin is on, or low if
* the pin is low.
*/
- assert_pos(0x10);
- ro reg (32) : {
- id_r : data_t[16];
- reserved(16);
+ union {
+ assert_pos(0x10);
+ ro reg (32) : struct {
+ id_r : data_t[16];
+ reserved(16);
+ };
+
+ // Additinoal values .
+ assert_pos(0x10);
+ struct {
+ assert_pos(0x10);
+ wo reg alt_r1(16);
+
+ assert_pos(0x12);
+ wo reg alt_r2(8);
+ reserved(8);
+ };
};
+ assert_pos(0x14);
+
/**
* Output data register.
@@ -109,8 +135,18 @@ package gpio {
* Writing to this register sets the appropriate register to low/high.
*/
assert_pos(0x14);
- wo reg (32) : {
- rw od_r : data_t[16];
+ wo reg (32) : struct {
+ union {
+ rw od_r : data_t[16];
+
+ struct {
+ rw osp_v : (15);
+ // Without the reserved bit, the compiler will complain about jagged
+ // unions.
+ reserved(1);
+ };
+ };
+
reserved(16);
};
@@ -118,7 +154,7 @@ package gpio {
* The GPIO port bit set/reset register.
*/
assert_pos(0x18);
- reg bsr_r(32) : {
+ reg bsr_r(32) : struct {
/**
* Sets the pins associated with the bits. Like od_r, but can be used to
* turn on multiple pins at once.
@@ -132,7 +168,7 @@ package gpio {
};
assert_pos(0x1c);
- reg(32) : {
+ reg(32) : struct {
lock : enum(1) {
unlocked = 0,
locked = 1,
@@ -148,7 +184,7 @@ package gpio {
* Each nybble refers to a pin.
*/
assert_pos(0x20);
- reg(64) : {
+ reg(64) : struct {
afn : (4)[16];
};
@@ -156,7 +192,7 @@ package gpio {
* The bit reset register.
*/
assert_pos(0x28);
- reg(32) : {
+ reg(32) : struct {
wo br_r : (16);
reserved (16);
};
@@ -164,13 +200,13 @@ package gpio {
/**
* Analog switch control for the pin.
*/
- reg(32) : {
+ reg(32) : struct {
asc_r : (16);
reserved (16);
};
};
- object gpio_a at gpio_a_base : gpio_t;
- object gpio_b at gpio_b_base : gpio_t;
- object gpio_c at gpio_c_base : gpio_t;
+ instance gpio_a at gpio_a_base : gpio_t;
+ instance gpio_b at gpio_b_base : gpio_t;
+ instance gpio_c at gpio_c_base : gpio_t;
};