Moved action to top level.

Removed old iterations of the project and moved the files from 02-usart
to the root directory since that's the sole place where the action is
and that subproject has outgrown its initial title.

8 files changed, 0 insertions, 400 deletions

diff --git a/01-system-clock/include/clock.h b/01-system-clock/include/clock.h
deleted file mode 100644
index de4fb96..0000000
--- a/01-system-clock/include/clock.h
+++ /dev/null
@@ -1,118 +0,0 @@
-#ifndef CLOCK_H__
-#define CLOCK_H__
-
-#include <stdint.h>
-#include "rcc.h"
-
-#define PERIPH_BASE ((uint32_t)0x40000000)
-#define AHBPERIPH_BASE (PERIPH_BASE + 0x00020000)
-#define FLASH_R_BASE (AHBPERIPH_BASE + 0x00003C00)
-#define PWR_BASE (PERIPH_BASE + 0x7000)
-#define PWR_CSR_VOSF ((uint16_t)0x0010) /*!< Voltage Scaling select flag */
-
-#ifndef __IO
-#define __IO volatile
-#endif
-
-typedef struct {
-  __IO uint32_t cr;
-  __IO uint32_t csr;
-} pwr_t;
-
-// typedef struct {
-//   __IO uint32_t acr;
-//   __IO uint32_t pecr;
-//   __IO uint32_t pdkeyr;
-//   __IO uint32_t pekeyr;
-//   __IO uint32_t prgkeyr;
-//   __IO uint32_t optkeyr;
-//   __IO uint32_t sr;
-//   __IO uint32_t obr;
-//   __IO uint32_t wrpr;
-// } flash_t;
-
-// #define FLASH (*(flash_t*) (FLASH_R_BASE))
-#define PWR (*(pwr_t*)(PWR_BASE))
-
-/* Valid values for the PLLR/PLLQ bits of the PLLCFG register. */
-typedef enum {
-  PLL_DIVISOR_2 = 1,
-  PLL_DIVISOR_4 = 3,
-  PLL_DIVISOR_6 = 5,
-  PLL_DIVISOR_8 = 7,
-  PLL_DIVISOR_OFF = 0,
-} pll_divisor_t;
-
-/* Valid values for the PLLP bits off the PLLCFG register. */
-typedef enum {
-  PLLP_DIVISOR_7 = 1,
-  PLLP_DIVISOR_17 = 3,
-  PLLP_DIVISOR_OFF = 0,
-} pllp_divisor_t;
-
-/* Valid values for the PLLM bits of the PLLCFG register. */
-typedef enum {
-  PLLM_DIVISOR_1 = 0,
-  PLLM_DIVISOR_2 = 1,
-  PLLM_DIVISOR_3 = 2,
-  PLLM_DIVISOR_4 = 3,
-  PLLM_DIVISOR_5 = 4,
-  PLLM_DIVISOR_6 = 5,
-  PLLM_DIVISOR_7 = 6,
-  PLLM_DIVISOR_8 = 7,
-} pllm_divisor_t;
-
-/* Possible sources for the input clock. */
-typedef enum {
-  PLL_SRC_NONE = 0,
-  PLL_SRC_MSI = 1,
-  PLL_SRC_HSI = 2,
-  PLL_SRC_HSE = 3,
-} pll_src_t;
-
-/* Valid sources for the system clock. */
-typedef enum {
-  SYSTEM_CLOCK_SRC_MSI = 0,
-  SYSTEM_CLOCK_SRC_HSI = 1,
-  SYSTEM_CLOCK_SRC_HSE = 2,
-  SYSTEM_CLOCK_SRC_PLL = 3,
-} system_clock_src_t;
-
-#define E_BADPLLN (-2)
-#define E_BADPLLP_DIV (-1)
-#define E_TIMEOUT (-3)
-#define E_NOT_OFF (-4)
-#define E_BAD_ARG (-5)
-
-/*
- * Sets the system clock to a full 80Mhz.
- */
-int set_system_clock_MHz(uint8_t mhz);
-
-/*
- * Set the PLL on.
- */
-int pll_on();
-
-/*
- * Set the PLL off.
- */
-int pll_off();
-
-/*
- * Sets the source of the system clock.
- */
-int set_system_clock_src(system_clock_src_t src);
-
-/*
- * Configure the PLL.
- */
-int configure_pll(
-    uint8_t pllp_div_factor, pll_divisor_t pllr, /* System clock divisor. */
-    pll_divisor_t pllq,  /* Divison factor for PLL48M1CLK. */
-    pllp_divisor_t pllp, /* Divison factor for PLLSAI2CLK. */
-    uint8_t plln,        /* PLL numerator. */
-    pllm_divisor_t pllm, /* PLL denominator. */
-    pll_src_t pllsrc /* PLL source */);
-
-#endif /* CLOCK_H__ */
diff --git a/01-system-clock/include/common.h b/01-system-clock/include/common.h
deleted file mode 100644
index 6fc701c..0000000
--- a/01-system-clock/include/common.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef COMMON__H
-#define COMMON__H
-
-/* Define __IO to be volatile if it's not already. */
-#ifndef __IO
-#define __IO volatile
-#endif
-
-#define bool int
-
-#define PACKED __attribute__((packed))
-#define BIT(n) (1 << (n))
-
-#endif /* COMMON_H */
diff --git a/01-system-clock/include/delay.h b/01-system-clock/include/delay.h
deleted file mode 100644
index 65a26d6..0000000
--- a/01-system-clock/include/delay.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef H__DELAY__
-#define H__DELAY__
-
-#include <stdint.h>
-
-/*
- * Loops and count-downs the delay, the time this takes depends on the speed
- * of the clock.
- */
-void delay(uint32_t delay);
-
-#endif /* H__DELAY__ */
diff --git a/01-system-clock/include/flash.h b/01-system-clock/include/flash.h
deleted file mode 100644
index a163a25..0000000
--- a/01-system-clock/include/flash.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef H__FLASH_
-#define H__FLASH_
-
-#include "common.h"
-
-/*
- * Header file for dealing with flash.
- */
-
-#define FLASH_BASE 0x40022000
-
-typedef struct {
-  __IO uint32_t ac_r; /* Flash access control register. */
-
-  /* TODO fill out the rest. */
-} PACKED flash_t;
-
-#define FLASH (*(__IO flash_t*)FLASH_BASE)
-
-#endif /* H__FLASH_ */
diff --git a/01-system-clock/include/gpio.h b/01-system-clock/include/gpio.h
deleted file mode 100644
index a8f06e2..0000000
--- a/01-system-clock/include/gpio.h
+++ /dev/null
@@ -1,120 +0,0 @@
-#ifndef GPIO_H__
-#define GPIO_H__
-
-#include "common.h"
-
-#include <stdint.h>
-
-/*
- * Possible GPIO ports.
- */
-typedef enum {
-  GPIO_PORT_A = 0,
-  GPIO_PORT_B = 1,
-  GPIO_PORT_C = 2,
-  GPIO_PORT_D = 3
-} gpio_port_number_t;
-
-/*
- * Structure defining the layout of the layout of the GPIO registers on the
- * stm32l432 development board.
- */
-typedef struct GPIO_PORT_STR {
-  __IO uint32_t mode_r;   /* Mode register */
-  __IO uint32_t pupd_r;   /* Pull up/pull down/none register */
-  __IO uint32_t speed_r;  /* Speed register */
-  __IO uint32_t type_r;   /* Type register */
-  __IO uint32_t input_r;  /* Input data register */
-  __IO uint32_t output_r; /* Output data register */
-  __IO uint32_t bsr_r;    /* Bit set/reset register */
-  __IO uint32_t lock_r;   /* Lock register */
-  __IO uint32_t altfn_r;  /* Alternate function register */
-} PACKED gpio_port_t;
-
-/*
- * Enum defining the PINs in a GPIO port. Each port has 16 pins to use in
- * the stm32l432.
- */
-typedef enum GPIO_PIN_ENUM {
-  PIN_0 = 0,
-  PIN_1 = 1,
-  PIN_2 = 2,
-  PIN_3 = 3,
-  PIN_4 = 4,
-  PIN_5 = 5,
-  PIN_6 = 6,
-  PIN_7 = 7,
-  PIN_8 = 8,
-  PIN_9 = 9,
-  PIN_10 = 10,
-  PIN_11 = 11,
-  PIN_12 = 12,
-  PIN_13 = 13,
-  PIN_14 = 14,
-  PIN_15 = 15
-} gpio_pin_t;
-
-/*
- * Enum defining the pin modes that are possible.
- */
-typedef enum {
-  MODE_INPUT = 0,
-  MODE_OUTPUT = 1,
-  MODE_ALTERNATE = 2,
-  MODE_ANALOG = 3
-} gpio_pin_mode_t;
-
-/*
- * Enum defining the pin speeds that are possible.
- */
-typedef enum {
-  SPEED_2MHZ = 0,
-  SPEED_10MHZ = 1,
-  SPEED_50MHZ = 3,
-} speed_t;
-
-/*
- * Structure defining an OUTPUT pin. Structurally equivalent to the input pin,
- * but can be used in a slightly type-safe manner.
- */
-typedef struct {
-  __IO gpio_port_t* gpio_port;
-  gpio_pin_t pin;
-} gpio_output_pin_t;
-
-/*
- * Sets the mode on a GPIO pin.
- *
- * gpio_port: the gpio port to use.
- * pin: the pin number to set.
- * pin_mode: the mode to set the pin to.
- */
-void set_gpio_pin_mode(
-    __IO gpio_port_t* gpio_port, gpio_pin_t pin, gpio_pin_mode_t pin_mode);
-
-/*
- * Sets the given GPIO pin to be an output pin. Returns an output_pin struct
- * corresponding to
- */
-gpio_output_pin_t set_gpio_pin_output(
-    __IO gpio_port_t* gpio_port, gpio_pin_t pin);
-
-/*
- * Sets an output pin on or off.
- *
- * pin: the pin to toggle.
- * onoff: 0 for off, non-zero of on.
- */
-void set_gpio_output_pin(gpio_output_pin_t pin, bool onoff);
-
-#define pin_on(p) set_gpio_output_pin(p, 1)
-
-#define pin_off(p) set_gpio_output_pin(p, 0)
-
-/*
- * Enables a GPIO port and returns a reference to the register definition
- * of that GPIO port.
- */
-__IO gpio_port_t* enable_gpio(gpio_port_number_t number);
-
-#endif /* GPIO_H__ */
diff --git a/01-system-clock/include/isr_vector.h b/01-system-clock/include/isr_vector.h
deleted file mode 100644
index 3e55f52..0000000
--- a/01-system-clock/include/isr_vector.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef h__ISR_VECTOR_H__
-#define h__ISR_VECTOR_H__
-
-/*
- * Include file for interrupt service routines.
- */
-
-/*
- * The interrupt service routines. These link in the function `main` as the
- * main function.
- */
-extern const void* isr_vector[];
-
-/*
- * Defines an error state. This loops forever and defines a distinct flashing
- * pattern to let the user know an unhandled ISR happened.
- */
-void unhandled_isr();
-
-#endif /* h___ISR_VECTOR_H__ */
diff --git a/01-system-clock/include/rcc.h b/01-system-clock/include/rcc.h
deleted file mode 100644
index 4eeb26b..0000000
--- a/01-system-clock/include/rcc.h
+++ /dev/null
@@ -1,81 +0,0 @@
-#ifndef H__RCC_
-#define H__RCC_
-
-#include "common.h"
-
-#define RCC_BASE ((uint32_t)0x40021000)
-
-typedef struct {
-  __IO uint32_t c_r;      /* Clock control register. 0x00 */
-  __IO uint32_t icsc_r;   /* Internal clock srcs calibration register. 0x04 */
-  __IO uint32_t cfg_r;    /* clock confguration register. 0x08 */
-  __IO uint32_t pllcfg_r; /* PLL Configuration register. 0x0c */
-  __IO uint32_t pllsai1cfg_r; /* PLLSAI1 configuration register. 0x10 */
-
-  __IO uint32_t reserved_1; /* Not used. offset 0x14. */
-
-  __IO uint32_t cie_r; /* Clock interrupt enable register. 0x18 */
-  __IO uint32_t cif_r; /* Clock interrupt flag regiseter.  0x1c */
-  __IO uint32_t cic_r; /* Clock interrupt clear register.  0x20 */
-
-  __IO uint32_t reserved_2; /* Not used. offset 0x24. */
-
-  __IO uint32_t ahb1rst_r; /* AHB Peripheral 1 reset register. 0x28 */
-  __IO uint32_t ahb2rst_r; /* AHB Peripheral 2 reset register. 0x2c */
-  __IO uint32_t ahb3rst_r; /* AHB Peripheral 3 reset register. 0x30 */
-
-  __IO uint32_t reserved_3; /* Not used. offset 0x34. */
-
-  __IO uint32_t abp1rst1_r; /* APB Peripheral reset register 1. 0x38 */
-  __IO uint32_t abp1rst2_r; /* APB Peripheral reset register 2. 0x3C */
-  __IO uint32_t abp2rst_r;  /* APB Peripheral reset register.   0x40 */
-
-  __IO uint32_t reserved_4; /* Not used. offset 0x44. */
-
-  __IO uint32_t ahb1en_r; /* AHB1 Peripheral enable register. 0x48 */
-  __IO uint32_t ahb2en_r; /* AHB2 Peripheral enable register. 0x4C */
-  __IO uint32_t ahb3en_r; /* AHB3 Peripheral enable register. 0x50 */
-
-  __IO uint32_t reserved_5; /* Not used. offset 0x54. */
-
-  __IO uint32_t apb1en1_r; /* APB1 Peripheral enable register 1. 0x58 */
-  __IO uint32_t apb1en2_r; /* APB1 Peripheral enable register 2. 0x5C */
-  __IO uint32_t apb2en_r;  /* APB2 Peripheral enable register.   0x60 */
-
-  __IO uint32_t reserved_6; /* Not used. offset 0x64. */
-
-  /* TODO add the rest starting at offset 0x68. */
-
-} PACKED rcc_t;
-
-#define RCC (*(__IO rcc_t*)RCC_BASE)
-
-/* Macros to operate on the RCC registers. */
-
-/* Sets the HSE. rcc is the RCC to use, e is zero for off, non-zero for on. */
-#define set_hse(rcc, e)        \
-  do {                         \
-    if (e) {                   \
-      (rcc).c_r |= 1 << 16;    \
-    } else {                   \
-      (rcc).c_r &= ~(1 << 16); \
-    }                          \
-  } while (0)
-
-/* Sets the HSI. rcc is the RCC to use, e is zero for off, non-zero for on. */
-#define set_hsi(rcc, e)       \
-  do {                        \
-    if (e) {                  \
-      (rcc).c_r |= 1 << 8;    \
-    } else {                  \
-      (rcc).c_r &= ~(1 << 8); \
-    }                         \
-  } while (0)
-
-/* Checks to see if the hse is ready. */
-#define hse_ready(rcc) ((rcc).c_r & (1 << 17))
-
-/* Checks to see if the hse is ready. */
-#define hsi_ready(rcc) ((rcc).c_r & (1 << 10))
-
-#endif
diff --git a/01-system-clock/include/spin.h b/01-system-clock/include/spin.h
deleted file mode 100644
index a23d25b..0000000
--- a/01-system-clock/include/spin.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef H__SPIN_
-#define H__SPIN_
-
-#include <stdint.h>
-
-/*
- * Flash a code on the status LED.
- *
- * The flash codes a binary from MSB to LSB. A long flash is a 1, a short flash
- * is a 0. Each independent flashing is succeced by a break of 4 times that
- * of a long flash.
- */
-void spin(uint32_t base_delay, uint8_t code);
-
-#endif /* H__SPIN_ */