Add new GPIO subsystem.

This gpio subsystem keeps track of the GPIO pins which
have been reserved and takes care of the housekeeping
with keeping them running.

This gpio subsystem also knows which alternate functions
belong to which pins, so it can automatically configure
the pins for the alternate functions.

3 files changed, 15 insertions, 64 deletions

diff --git a/02-usart/src/arch/stm32l4xxx/peripherals/clock.c b/02-usart/src/arch/stm32l4xxx/peripherals/clock.c
index ba127a9..1029d39 100644
--- a/02-usart/src/arch/stm32l4xxx/peripherals/clock.c
+++ b/02-usart/src/arch/stm32l4xxx/peripherals/clock.c
@@ -6,7 +6,6 @@
 #include "arch/stm32l4xxx/peripherals/flash.h"
 
 #include <stdint.h>
-#include "kern/spin.h"
 
 #define TIMEOUT 10000
 
diff --git a/02-usart/src/arch/stm32l4xxx/peripherals/gpio.c b/02-usart/src/arch/stm32l4xxx/peripherals/gpio.c
deleted file mode 100644
index a1e82c7..0000000
--- a/02-usart/src/arch/stm32l4xxx/peripherals/gpio.c
+++ /dev/null
@@ -1,52 +0,0 @@
-#include "arch/stm32l4xxx/peripherals/gpio.h"
-#include "arch/stm32l4xxx/peripherals/rcc.h"
-
-/*
- * Sets the mode of a pin on a gpio por.
- */
-void set_gpio_pin_mode(
-    __IO gpio_port_t* gpio_port, gpio_pin_t pin, gpio_pin_mode_t mode)
-{
-  /* Each pin has a 2-bit mode provided at bits pin#*2 and pin#*2+1 */
-  gpio_port->mode_r &= ~(0x03 << pin * 2);
-  gpio_port->mode_r |= mode << pin * 2;
-}
-
-gpio_output_pin_t set_gpio_pin_output(
-    __IO gpio_port_t* gpio_port, gpio_pin_t pin)
-{
-  set_gpio_pin_mode(gpio_port, pin, MODE_OUTPUT);
-
-  return (gpio_output_pin_t){.gpio_port = gpio_port, .pin = pin};
-}
-
-void set_gpio_output_pin(gpio_output_pin_t pin, bool onoff)
-{
-  if (onoff) {
-    pin.gpio_port->output_r |= 1 << pin.pin;
-  } else {
-    pin.gpio_port->output_r &= ~(1 << pin.pin);
-  }
-}
-
-void set_gpio_alternate_function(
-    __IO gpio_port_t* port, gpio_pin_t gpio_pin, alternate_function_t afn)
-{
-  __IO uint32_t* reg;
-  if (gpio_pin < 8) {
-    reg = &(port->af_rl);
-  } else {
-    reg = &(port->af_rh);
-    gpio_pin -= 8;
-  }
-
-  uint32_t tmp = *reg & (~0x0f << gpio_pin * 4);
-  *reg = tmp | (afn << gpio_pin * 4);
-}
-
-#define GPIO_PORTS_BASE_ADDR ((uint8_t*)0x48000000)
-__IO gpio_port_t* enable_gpio(gpio_port_number_t gpio_port_number)
-{
-  RCC.ahb2en_r |= 1 << gpio_port_number; /* Enable the GPIO port. */
-  return (__IO gpio_port_t*)(GPIO_PORTS_BASE_ADDR + (gpio_port_number * 0x400));
-}
diff --git a/02-usart/src/arch/stm32l4xxx/peripherals/irq.c b/02-usart/src/arch/stm32l4xxx/peripherals/irq.c
index 8fb3e49..364b9a7 100644
--- a/02-usart/src/arch/stm32l4xxx/peripherals/irq.c
+++ b/02-usart/src/arch/stm32l4xxx/peripherals/irq.c
@@ -4,6 +4,7 @@
 
 #include "arch.h"
 #include "kern/delay.h"
+#include "kern/gpio/gpio_manager.h"
 
 #define IRQ_RESERVED(n)
 #define IRQ(name, uname_, n) \
@@ -16,10 +17,11 @@
 
 void isr_simple_pin_on()
 {
-  __IO gpio_port_t* port_b = enable_gpio(GPIO_PORT_B);
-  gpio_output_pin_t pin3 = set_gpio_pin_output(port_b, PIN_3);
+  int ec;
+  gpio_pin_opts_t opts = DEFAULT_GPIO_OPTS_OUTPUT;
+  gpio_reserved_pin_t pin3 = reserve_gpio_pin(GPIO_PIN_PB3, &opts, &ec);
 
-  pin_on(pin3);
+  set_gpio_pin_high(pin3);
 }
 
 #define IRQ_RESERVED(n) 0,
@@ -47,13 +49,15 @@ const void* vectors[] __attribute__((section(".vectors"))) = {
  */
 void unhandled_isr(uint8_t number)
 {
-  __IO gpio_port_t* port_b = enable_gpio(GPIO_PORT_B);
-  gpio_output_pin_t pin3 = set_gpio_pin_output(port_b, PIN_3);
+  int ec;
+  gpio_pin_opts_t opts = DEFAULT_GPIO_OPTS_OUTPUT;
+  gpio_reserved_pin_t pin3 = reserve_gpio_pin(GPIO_PIN_PB3, &opts, &ec);
+
   for (;;) {
     for (int i = 0; i < 20; ++ i) {
-       pin_on(pin3);
+       set_gpio_pin_high(pin3);
        delay(1000000);
-       pin_off(pin3);
+       set_gpio_pin_low(pin3);
        delay(1000000);
     }
     delay(50000000);
@@ -62,15 +66,15 @@ void unhandled_isr(uint8_t number)
     for (int i = 0; i < 8; ++ i) {
       if (n & 1) {
        // LSB is a 1
-       pin_on(pin3);
+       set_gpio_pin_high(pin3);
        delay(15000000);
-       pin_off(pin3);
+       set_gpio_pin_low(pin3);
        delay(15000000);
       } else {
        // LSB is a 0
-       pin_on(pin3);
+       set_gpio_pin_high(pin3);
        delay(1000000);
-       pin_off(pin3);
+       set_gpio_pin_low(pin3);
        delay(29000000);
       }