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authorJosh Rahm <joshuarahm@gmail.com>2020-11-22 01:06:30 -0700
committerJosh Rahm <joshuarahm@gmail.com>2020-11-22 01:06:30 -0700
commit9f28e53c71d28d04e2775c59944d2887a99f1e86 (patch)
treec0ecb2872c6d27acf08aa73919d709f949200de5 /02-usart/src/kern/spin.c
parentebb9123c00d1e9629376b6f0a2f1f4e7e550c2af (diff)
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Large reorganization.
What was in core/ is now moved to arch/stm34l4xxx/peripherals. This new directory is *supposed to* to contain raw header files defining just the pertinent register structures for the various peripherals. Peripheral management belongs somewhere in the new `kern/..` directories. This is not completely the case at the moment, so more refactoring needs to be done. What was sitting in the root has now been moved into the kern/ directory. The kern/ directory is to contain everything else other than raw device register definitions. The root of the kern/ tree is reserved for standard library-esque headers. The kern/<peripheral> directory contains management systems for that peripheral. (At the moment DMA is the only peripheral with a decent management system.) Preferably these peripheral systems should only include their correlating header in arch/stm34l4xxx/peripherals, and use other management systems for handling other peripherals rather than manipulating their raw registers directly. (Though this ideal will require much more critical mass of management systems.)
Diffstat (limited to '02-usart/src/kern/spin.c')
-rw-r--r--02-usart/src/kern/spin.c49
1 files changed, 49 insertions, 0 deletions
diff --git a/02-usart/src/kern/spin.c b/02-usart/src/kern/spin.c
new file mode 100644
index 0000000..7c4f6eb
--- /dev/null
+++ b/02-usart/src/kern/spin.c
@@ -0,0 +1,49 @@
+#include "kern/spin.h"
+#include "kern/delay.h"
+#include "arch/stm32l4xxx/peripherals/gpio.h"
+
+#define SHORT_DELAY 200000
+#define LONG_DELAY (SHORT_DELAY * 2)
+
+static void flash_bit(
+ uint32_t base, gpio_output_pin_t out_pin,
+ uint8_t bit /* 0 => 0, non-zero => 1 */)
+{
+ pin_on(out_pin);
+ if (bit) {
+ delay(base * 2);
+ } else {
+ delay(base);
+ }
+ pin_off(out_pin);
+ delay(base);
+}
+
+void spin(uint32_t base, uint8_t c)
+{
+ uint8_t code;
+ __IO gpio_port_t* port_b = enable_gpio(GPIO_PORT_B);
+ gpio_output_pin_t pin3 = set_gpio_pin_output(port_b, PIN_3);
+
+ for (;;) {
+ code = c;
+ flash_bit(base, pin3, code & 0x80);
+ code <<= 1;
+ flash_bit(base, pin3, code & 0x80);
+ code <<= 1;
+ flash_bit(base, pin3, code & 0x80);
+ code <<= 1;
+ flash_bit(base, pin3, code & 0x80);
+
+ code <<= 1;
+ flash_bit(base, pin3, code & 0x80);
+ code <<= 1;
+ flash_bit(base, pin3, code & 0x80);
+ code <<= 1;
+ flash_bit(base, pin3, code & 0x80);
+ code <<= 1;
+ flash_bit(base, pin3, code & 0x80);
+
+ delay(base * 4);
+ }
+}