aboutsummaryrefslogtreecommitdiff
path: root/02-usart/tests/test_usart.c
diff options
context:
space:
mode:
authorJosh Rahm <joshuarahm@gmail.com>2020-11-18 21:11:01 -0700
committerJosh Rahm <joshuarahm@gmail.com>2020-11-18 21:16:12 -0700
commitc1405b06d98b9b227fa7ff53c158f31d745eb505 (patch)
tree77397453c2b0e20bbb4136aa52836fe3eb0e41e6 /02-usart/tests/test_usart.c
parent44c2d2d5e5ce43563a4912b2967cdb6b2039b6dd (diff)
downloadstm32l4-c1405b06d98b9b227fa7ff53c158f31d745eb505.tar.gz
stm32l4-c1405b06d98b9b227fa7ff53c158f31d745eb505.tar.bz2
stm32l4-c1405b06d98b9b227fa7ff53c158f31d745eb505.zip
Reorganize some file. Put thte core register libraries in a core/
subdirectory.
Diffstat (limited to '02-usart/tests/test_usart.c')
-rw-r--r--02-usart/tests/test_usart.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/02-usart/tests/test_usart.c b/02-usart/tests/test_usart.c
new file mode 100644
index 0000000..e2cfdf8
--- /dev/null
+++ b/02-usart/tests/test_usart.c
@@ -0,0 +1,20 @@
+#include "test_harness.h"
+#include "core/usart.h"
+
+#include <stdlib.h>
+
+TEST(usart, enable_dma)
+{
+ __IO usart_t* usart = &USART1;
+
+ usart->c_r3 = 0;
+
+ usart_enable_dma(usart, USART_ENABLE_TX);
+ ASSERT_EQ(usart->c_r3, 128);
+
+ usart_enable_dma(usart, USART_ENABLE_RX);
+ ASSERT_EQ(usart->c_r3, 192);
+
+ usart_enable_dma(usart, USART_ENABLE_DISABLED);
+ ASSERT_EQ(usart->c_r3, 0);
+}