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author | Josh Rahm <joshuarahm@gmail.com> | 2018-01-23 23:24:53 -0700 |
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committer | Josh Rahm <joshuarahm@gmail.com> | 2018-01-23 23:24:53 -0700 |
commit | 2545ae2d57e5b70975e3fd3b3e570da13dbf62f0 (patch) | |
tree | a8fe7fe54688defdab1ce5fcd83f66f17eb5bb4b /03-refactor/src/spin.c | |
parent | 7aa10db46c13ad8adc88aadff39b8cf6b15db09d (diff) | |
download | stm32l4-2545ae2d57e5b70975e3fd3b3e570da13dbf62f0.tar.gz stm32l4-2545ae2d57e5b70975e3fd3b3e570da13dbf62f0.tar.bz2 stm32l4-2545ae2d57e5b70975e3fd3b3e570da13dbf62f0.zip |
start refactor process. Change rcc->c_r to bitfield.
Diffstat (limited to '03-refactor/src/spin.c')
-rw-r--r-- | 03-refactor/src/spin.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/03-refactor/src/spin.c b/03-refactor/src/spin.c new file mode 100644 index 0000000..fbd16b6 --- /dev/null +++ b/03-refactor/src/spin.c @@ -0,0 +1,49 @@ +#include "spin.h" +#include "delay.h" +#include "gpio.h" + +#define SHORT_DELAY 200000 +#define LONG_DELAY (SHORT_DELAY * 2) + +static void flash_bit( + uint32_t base, gpio_output_pin_t out_pin, + uint8_t bit /* 0 => 0, non-zero => 1 */) +{ + pin_on(out_pin); + if (bit) { + delay(base * 2); + } else { + delay(base); + } + pin_off(out_pin); + delay(base); +} + +void spin(uint32_t base, uint8_t c) +{ + uint8_t code; + __IO gpio_port_t* port_b = enable_gpio(GPIO_PORT_B); + gpio_output_pin_t pin3 = set_gpio_pin_output(port_b, PIN_3); + + for (;;) { + code = c; + flash_bit(base, pin3, code & 0x80); + code <<= 1; + flash_bit(base, pin3, code & 0x80); + code <<= 1; + flash_bit(base, pin3, code & 0x80); + code <<= 1; + flash_bit(base, pin3, code & 0x80); + + code <<= 1; + flash_bit(base, pin3, code & 0x80); + code <<= 1; + flash_bit(base, pin3, code & 0x80); + code <<= 1; + flash_bit(base, pin3, code & 0x80); + code <<= 1; + flash_bit(base, pin3, code & 0x80); + + delay(base * 4); + } +} |