Update .clang-format and run it on filse

3 files changed, 43 insertions, 39 deletions

diff --git a/src/arch/stm32l4xxx/peripherals/clock.c b/src/arch/stm32l4xxx/peripherals/clock.c
index 9051572..32cd00c 100644
--- a/src/arch/stm32l4xxx/peripherals/clock.c
+++ b/src/arch/stm32l4xxx/peripherals/clock.c
@@ -3,14 +3,13 @@
  */
 
 #include "arch/stm32l4xxx/peripherals/clock.h"
-#include "arch/stm32l4xxx/peripherals/flash.h"
-
-#include "kern/init.h"
 
 #include <stdint.h>
 
-#define TIMEOUT 10000
+#include "arch/stm32l4xxx/peripherals/flash.h"
+#include "kern/init.h"
 
+#define TIMEOUT 10000
 
 int pll_off()
 {
@@ -43,7 +42,8 @@ int pll_on()
 }
 
 int configure_pll(
-    uint8_t pllp_div_factor, pll_divisor_t pllr, /* System clock divisor. */
+    uint8_t pllp_div_factor,
+    pll_divisor_t pllr,  /* System clock divisor. */
     pll_divisor_t pllq,  /* Divison factor for PLL48M1CLK. */
     pllp_divisor_t pllp, /* Divison factor for PLLSAI2CLK. */
     uint8_t plln,        /* PLL numerator. */
@@ -89,12 +89,15 @@ int set_system_clock_MHz(uint8_t mhz)
   pll_off();
 
   configure_pll(
-      0 /* pllp_div_factor */, PLL_DIVISOR_4 /* pllr: VCO / 4 = mhz MHz. */,
-      PLL_DIVISOR_4 /* pllq: VCO / 4 = mhz MHz */, PLLP_DIVISOR_7 /* pllp */,
+      0 /* pllp_div_factor */,
+      PLL_DIVISOR_4 /* pllr: VCO / 4 = mhz MHz. */,
+      PLL_DIVISOR_4 /* pllq: VCO / 4 = mhz MHz */,
+      PLLP_DIVISOR_7 /* pllp */,
 
       /* The following set the frequency of VCO to (mhz*4)MHz: mhz * 1 * 4MHz.
        */
-      mhz /* plln    | mhz */, PLLM_DIVISOR_1 /* pllm    | 01 */,
+      mhz /* plln    | mhz */,
+      PLLM_DIVISOR_1 /* pllm    | 01 */,
       PLL_SRC_MSI /* pll src | 04 Mhz */);
 
   pll_on();
diff --git a/src/arch/stm32l4xxx/peripherals/irq.c b/src/arch/stm32l4xxx/peripherals/irq.c
index 364b9a7..7870a10 100644
--- a/src/arch/stm32l4xxx/peripherals/irq.c
+++ b/src/arch/stm32l4xxx/peripherals/irq.c
@@ -1,16 +1,14 @@
 #include "arch/stm32l4xxx/peripherals/irq.h"
-#include "arch/stm32l4xxx/peripherals/gpio.h"
-#include "arch/stm32l4xxx/peripherals/nvic.h"
 
 #include "arch.h"
+#include "arch/stm32l4xxx/peripherals/gpio.h"
+#include "arch/stm32l4xxx/peripherals/nvic.h"
 #include "kern/delay.h"
 #include "kern/gpio/gpio_manager.h"
 
 #define IRQ_RESERVED(n)
 #define IRQ(name, uname_, n) \
-  void WEAK name () { \
-    unhandled_isr(n); \
-  }
+  void WEAK name() { unhandled_isr(n); }
 #include "arch/stm32l4xxx/peripherals/isrs.inc"
 #undef IRQ_RESERVED
 #undef IRQ
@@ -54,28 +52,28 @@ void unhandled_isr(uint8_t number)
   gpio_reserved_pin_t pin3 = reserve_gpio_pin(GPIO_PIN_PB3, &opts, &ec);
 
   for (;;) {
-    for (int i = 0; i < 20; ++ i) {
-       set_gpio_pin_high(pin3);
-       delay(1000000);
-       set_gpio_pin_low(pin3);
-       delay(1000000);
+    for (int i = 0; i < 20; ++i) {
+      set_gpio_pin_high(pin3);
+      delay(1000000);
+      set_gpio_pin_low(pin3);
+      delay(1000000);
     }
     delay(50000000);
 
     int n = number;
-    for (int i = 0; i < 8; ++ i) {
+    for (int i = 0; i < 8; ++i) {
       if (n & 1) {
-       // LSB is a 1
-       set_gpio_pin_high(pin3);
-       delay(15000000);
-       set_gpio_pin_low(pin3);
-       delay(15000000);
+        // LSB is a 1
+        set_gpio_pin_high(pin3);
+        delay(15000000);
+        set_gpio_pin_low(pin3);
+        delay(15000000);
       } else {
-       // LSB is a 0
-       set_gpio_pin_high(pin3);
-       delay(1000000);
-       set_gpio_pin_low(pin3);
-       delay(29000000);
+        // LSB is a 0
+        set_gpio_pin_high(pin3);
+        delay(1000000);
+        set_gpio_pin_low(pin3);
+        delay(29000000);
       }
 
       n >>= 1;
@@ -85,12 +83,12 @@ void unhandled_isr(uint8_t number)
 
 void enable_interrupts(interrupt_set_t* interrupts)
 {
-  for (int i = 0; i < sizeof(NVIC.ise_r) / sizeof(uint32_t); ++ i)
+  for (int i = 0; i < sizeof(NVIC.ise_r) / sizeof(uint32_t); ++i)
     NVIC.ise_r[i] = interrupts->irqs[i];
 }
 
 void disable_interrupts(interrupt_set_t* interrupts)
 {
-  for (int i = 0; i < sizeof(NVIC.ise_r) / sizeof(uint32_t); ++ i)
+  for (int i = 0; i < sizeof(NVIC.ise_r) / sizeof(uint32_t); ++i)
     NVIC.ice_r[i] = interrupts->irqs[i];
 }
diff --git a/src/arch/stm32l4xxx/peripherals/usart.c b/src/arch/stm32l4xxx/peripherals/usart.c
index 7309b48..c682671 100644
--- a/src/arch/stm32l4xxx/peripherals/usart.c
+++ b/src/arch/stm32l4xxx/peripherals/usart.c
@@ -1,7 +1,9 @@
 #include "arch/stm32l4xxx/peripherals/usart.h"
+
+#include <stdarg.h>
+
 #include "kern/delay.h"
 #include "kern/lib.h"
-#include <stdarg.h>
 
 void set_usart1_clock_src(__IO rcc_t* rcc, usart_clk_src_t usart_clk_src)
 {
@@ -62,10 +64,11 @@ void usart_transmit_byte_sync(__IO usart_t* usart, uint8_t byte)
     ;
 }
 
-void usart_transmit_bytes_sync(__IO usart_t* usart, const uint8_t* bytes, uint32_t n)
+void usart_transmit_bytes_sync(
+    __IO usart_t* usart, const uint8_t* bytes, uint32_t n)
 {
-  while (n --) {
-    usart_transmit_byte_sync(usart, *(bytes ++));
+  while (n--) {
+    usart_transmit_byte_sync(usart, *(bytes++));
   }
 }
 
@@ -75,13 +78,13 @@ void usart_transmit_str_sync(__IO usart_t* usart, const char* str)
     if (*str == '\n') {
       usart_transmit_byte_sync(usart, '\r');
     }
-    usart_transmit_byte_sync(usart, *(str ++));
+    usart_transmit_byte_sync(usart, *(str++));
   }
 }
 
 void usart_enable_dma(__IO usart_t* usart, usart_enable_t enabled)
 {
-  switch(enabled) {
+  switch (enabled) {
     case USART_ENABLE_DISABLED:
       regset(usart->c_r3, usart_dmar, 0);
       regset(usart->c_r3, usart_dmat, 0);
@@ -130,12 +133,12 @@ void usart_vprintf(__IO usart_t* usart, const char* fmt, va_list l)
           b.str = va_arg(l, char*);
           usart_transmit_str_sync(usart, b.str);
       }
-      ++ fmt;
+      ++fmt;
     } else {
       if (*fmt == '\n') {
         usart_transmit_byte_sync(usart, '\r');
       }
-      usart_transmit_byte_sync(usart, *(fmt ++));
+      usart_transmit_byte_sync(usart, *(fmt++));
     }
   }