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authorJosh Rahm <joshuarahm@gmail.com>2020-11-28 23:21:22 -0700
committerJosh Rahm <joshuarahm@gmail.com>2020-11-28 23:21:22 -0700
commitfd674424d19cf12c1186394606729cff236d5bdf (patch)
tree5ecd05faa96a32dbf86a94cec191954c14f1cb0f /src
parent654511788e24794c03ecb810a3b5907e95b8b55c (diff)
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Some LED lights working. Not great. WIP
Diffstat (limited to 'src')
-rw-r--r--src/drv/ws2812B/ws2812b.c55
-rw-r--r--src/kern/dma/dma_manager.c55
-rw-r--r--src/kern/main.c173
-rw-r--r--src/kern/mem.c18
-rw-r--r--src/kern/stdlibrepl.c15
5 files changed, 282 insertions, 34 deletions
diff --git a/src/drv/ws2812B/ws2812b.c b/src/drv/ws2812B/ws2812b.c
new file mode 100644
index 0000000..e1e9309
--- /dev/null
+++ b/src/drv/ws2812B/ws2812b.c
@@ -0,0 +1,55 @@
+#include "drv/ws2812B/ws2812b.h"
+
+#include "kern/mem.h"
+#include "kern/panic.h"
+#include "kern/dma/dma_manager.h"
+#include "arch/stm32l4xxx/peripherals/spi.h"
+
+uint8_t* ws2812b_compile_rgb(rgb_t* out_, size_t arr_len)
+{
+ uint8_t* out = (uint8_t*) out_;
+ uint8_t* spi_out = kalloc(arr_len * 9);
+
+ if (!spi_out) {
+ panic("Unable to allocate spi_out\n");
+ }
+
+ size_t i;
+ size_t j;
+
+ for (i = 0, j = 0; i < arr_len * 3; ++i, j += 3) {
+ // stuff
+ uint8_t c = out[i];
+ spi_out[j] = 0
+ | (1 << 7)
+ | ((c & (1 << 7)) << 6)
+ | (0 << 5)
+ | (1 << 4)
+ | ((c & (1 << 6)) << 3)
+ | (0 << 2)
+ | (1 << 1)
+ | ((c & (1 << 5)) << 0);
+
+ spi_out[j + 1] = 0
+ | (0 << 7)
+ | (1 << 6)
+ | ((c & (1 << 4)) << 5)
+ | (0 << 4)
+ | (1 << 3)
+ | ((c & (1 << 3)) << 2)
+ | (0 << 1)
+ | (1 << 0);
+
+ spi_out[j + 2] = 0
+ | ((c & (1 << 2)) << 7)
+ | (0 << 6)
+ | (1 << 5)
+ | ((c & (1 << 1)) << 4)
+ | (0 << 3)
+ | (1 << 2)
+ | ((c & (1 << 0)) << 1)
+ | (0 << 0);
+ }
+
+ return spi_out;
+}
diff --git a/src/kern/dma/dma_manager.c b/src/kern/dma/dma_manager.c
index 9ffa795..39ae9a3 100644
--- a/src/kern/dma/dma_manager.c
+++ b/src/kern/dma/dma_manager.c
@@ -2,10 +2,38 @@
#include "arch/stm32l4xxx/peripherals/dma.h"
#include "arch/stm32l4xxx/peripherals/rcc.h"
+#include "arch/stm32l4xxx/peripherals/spi.h"
#include "arch/stm32l4xxx/peripherals/usart.h"
/* Bitmask of DMA2 channels in use. */
-static uint8_t dma_inuse[2];
+uint8_t dma_inuse[2];
+
+void (*dma_channel_callbacks[14])(void*);
+void* callback_args[14];
+
+#define ON_DMA(dma, chan) \
+ void on_dma##dma##_channel##chan() \
+ { \
+ if (dma_channel_callbacks[(dma - 1) * 7 + (chan - 1)]) { \
+ dma_channel_callbacks[(dma - 1) * 7 + (chan - 1)]( \
+ callback_args[(dma - 1) * 7 + (chan - 1)]); \
+ } \
+ }
+
+ON_DMA(1, 1);
+ON_DMA(1, 2);
+ON_DMA(1, 3);
+ON_DMA(1, 4);
+ON_DMA(1, 5);
+ON_DMA(1, 6);
+ON_DMA(1, 7);
+ON_DMA(2, 1);
+ON_DMA(2, 2);
+ON_DMA(2, 3);
+ON_DMA(2, 4);
+ON_DMA(2, 5);
+ON_DMA(2, 6);
+ON_DMA(2, 7);
static inline dma_t* get_dma(int dma)
{
@@ -37,6 +65,12 @@ static uint32_t get_periph_location(dma_peripheral_t operipheral)
CASE(DMA1_PERIPH_USART1_TX, &USART1.td_r)
CASE(DMA1_PERIPH_USART2_RX, &USART2.rd_r)
CASE(DMA1_PERIPH_USART2_TX, &USART2.td_r)
+ CASE(DMA2_PERIPH_SPI1_RX, &SPI1.d_r)
+ CASE(DMA2_PERIPH_SPI1_TX, &SPI1.d_r)
+ CASE(DMA1_PERIPH_SPI1_RX, &SPI1.d_r)
+ CASE(DMA1_PERIPH_SPI1_TX, &SPI1.d_r)
+ CASE(DMA2_PERIPH_SPI3_RX, &SPI3.d_r)
+ CASE(DMA2_PERIPH_SPI3_TX, &SPI3.d_r)
default:
return 0;
@@ -280,6 +314,25 @@ void dma_p2mem_initiate_transfer(
regset(config->cc_r, dma_cc_en, 1);
}
+void dma_chan_set_callback(
+ dma_channel_t chan, void (*callback)(void*), void* arg)
+{
+ dma_channel_callbacks[chan.dma * 7 + chan.chan] = callback;
+ callback_args[chan.dma * 7 + chan.chan] = arg;
+ enable_interrupt(dma_channel_get_interrupt(chan));
+}
+
+void dma_channel_interrupt_enable(dma_channel_t chan, bool enabled)
+{
+ dma_channel_config_t* config = get_raw_channel_config(chan);
+ regset(config->cc_r, dma_cc_tcie, !!enabled);
+ if (enabled) {
+ enable_interrupt(dma_channel_get_interrupt(chan));
+ } else {
+ disable_interrupt(dma_channel_get_interrupt(chan));
+ }
+}
+
interrupt_t dma_channel_get_interrupt(dma_channel_t chan)
{
if (chan.dma == 0) {
diff --git a/src/kern/main.c b/src/kern/main.c
index d4393f3..3dcadf6 100644
--- a/src/kern/main.c
+++ b/src/kern/main.c
@@ -1,17 +1,61 @@
#include "arch.h"
#include "arch/arm/cortex-m4/mpu.h"
#include "arch/stm32l4xxx/peripherals/clock.h"
+#include "arch/stm32l4xxx/peripherals/dma.h"
#include "arch/stm32l4xxx/peripherals/rcc.h"
+#include "arch/stm32l4xxx/peripherals/irq.h"
#include "arch/stm32l4xxx/peripherals/spi.h"
#include "arch/stm32l4xxx/peripherals/system.h"
#include "kern/gpio/gpio_manager.h"
+#include "kern/dma/dma_manager.h"
#include "kern/init.h"
#include "kern/log.h"
#include "kern/mem.h"
#include "kern/mpu/mpu_manager.h"
#include "kern/panic.h"
+#include "kern/delay.h"
#include "kern/priv.h"
+#include "kern/gpio/sysled.h"
+#include "arch/stm32l4xxx/peripherals/clock.h"
#include "user/syscall.h"
+#include "drv/ws2812B/ws2812b.h"
+
+
+gpio_reserved_pin_t sysl;
+int syslon;
+int n;
+uint16_t my_short;
+extern uint16_t dma_inuse;
+
+void on_spi1()
+{
+ SPI1.d_r = ~my_short;
+ if (n++ == 10000) {
+ if (syslon) {
+ set_gpio_pin_low(sysl);
+ } else {
+ set_gpio_pin_high(sysl);
+ }
+
+ syslon = !syslon;
+ n = 0;
+ }
+}
+
+inline void spi_write_byte(uint8_t byte)
+{
+ // volatile uint32_t read;
+
+ //delay(5);
+ //while (regget(SPI1.s_r, spi_rxne)) {
+ // read = SPI1.d_r;
+ //}
+ //delay(5);
+
+ //delay(5);
+ while (regget(SPI1.s_r, spi_ftlvl) > SPI_FIFO_STATUS_HALF);
+ SPI1.d_r = (byte << 8) | byte;
+}
void on_hard_fault()
{
@@ -20,7 +64,9 @@ void on_hard_fault()
void on_systick() /* Overrides weak-symbol on_systick. */
{
- klogf("Systick\n");
+ // klogf("systick\n");
+ if (my_short == 0) my_short = 0xffff;
+ my_short >>=1;
}
void configure_mpu()
@@ -32,14 +78,92 @@ void configure_mpu()
mpu_set_enabled(1);
}
+static void dma_callback(void* arg)
+{
+ klogf("Dma callback\n");
+ dma_channel_t* chan = arg;
+
+ release_dma_channel(*chan);
+ dma_channel_interrupt_enable(*chan, 0);
+
+ regset(SPI1.c_r1, spi_spe, 0);
+
+ DMA2.ifc_r |= 0xffffffff;
+ DMA1.ifc_r |= 0xffffffff;
+ regset(DMA2.channel_config[3].cc_r, dma_cc_en, 0);
+}
+
#ifdef ARCH_STM32L4
/* Main function. This gets executed from the interrupt vector defined above. */
int main()
{
- configure_mpu();
+ int ec = 0;
+
+ size_t size = 20;
+ rgb_t arr[] = {
+ {0x00, 0x00, 0xff},
+ {0x00, 0xff, 0x00},
+ {0xff, 0x00, 0x00},
+
+ {0xff, 0x80, 0x80},
+ {0x80, 0xff, 0x80},
+ {0x80, 0x80, 0xff},
- int ec;
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+ {0xff, 0xff, 0xff},
+ };
+ uint8_t* dataptr = ws2812b_compile_rgb(arr, size);
+
+ klogf("Heap start: %p\n", &HEAP_START);
+ klogf("Heap end: %p\n", &HEAP_STOP);
+ klogf("Dataptr start: %p\n", dataptr);
+ klogf("Dataptr end: %p\n", (dataptr + size));
+
+ dma_opts_t opts = DEFAULT_DMA_OPTS;
+ opts.transfer_complete_interrupt_enable = 1;
+ opts.circular_mode = 0;
+ dma_mem2p_channel_t dma_chan =
+ select_dma_channel_mem2p(DMA2_PERIPH_SPI1_TX, &opts, &ec);
+ dma_chan_set_callback(dma_chan.c_, dma_callback, &dma_chan);
+
+ if (ec) {
+ panic("Unable to allocate dma channel: %d\n", ec);
+ }
+
+ my_short = 0xff;
+ klogf("This is weird.\n");
+ // configure_mpu();
+ sysl = get_sysled();
// gpio_enable_alternate_function(
// GPIO_ALTERNATE_FUNCTION_SPI1_MISO, GPIO_PIN_PA6, &ec);
@@ -62,8 +186,19 @@ int main()
klogf("Unable to set pin PA5 (ec=%d)\n", ec);
}
+ /* Set the countdown to start from 10,000,0000. */
+ SCB.strv_r = 1000000;
+
+ /* Enable interrupts. */
+ regset(SCB.stcs_r, scb_tickint, 1);
+
+ /* Start the systick. */
+ regset(SCB.stcs_r, scb_enable, 1);
+
regset(RCC.apb2en_r, rcc_spi1en, 1);
+ enable_interrupt(IRQ_SPI1);
+
uint32_t reg = 0;
regset(reg, spi_ldma_tx, 0);
regset(reg, spi_ldma_rx, 0);
@@ -75,7 +210,7 @@ int main()
regset(reg, spi_frf, 0);
regset(reg, spi_nssp, 0);
regset(reg, spi_ssoe, 0);
- regset(reg, spi_txdmaen, 0);
+ regset(reg, spi_txdmaen, 1);
regset(reg, spi_rxdmaen, 0);
SPI1.c_r2 = reg;
@@ -89,34 +224,18 @@ int main()
regset(reg, spi_ssi, 1);
regset(reg, spi_lsbfirst, 0);
regset(reg, spi_spe, 1);
- regset(reg, spi_br, SPI_BAUD_FPCLK_DIV_256);
+ regset(reg, spi_br, SPI_BAUD_FPCLK_DIV_32);
regset(reg, spi_mstr, 1);
regset(reg, spi_cpol, 0);
regset(reg, spi_cpha, 0);
SPI1.c_r1 = reg;
- uint8_t val = 0xf0;
- SPI1.d_r = val;
- SPI1.d_r = val;
- SPI1.d_r = val;
- SPI1.d_r = val;
- SPI1.d_r = val;
- SPI1.d_r = val;
- SPI1.d_r = val;
- SPI1.d_r = val;
- SPI1.d_r = val;
- SPI1.d_r = val;
- SPI1.d_r = val;
- klogf("4 Spi Status %p\n", SPI1.s_r);
-
- for (;;) SPI1.d_r = val;
- // for (;;) {
- // klogf("Spi Status %p\n", SPI1.s_r);
- // // while (!regget(SPI1.s_r, spi_txe))
- // // ;
- // // klogf("Write\n");
- // // SPI1.d_r = val;
- // }
+ klogf("Initiate xfer\n");
+ dma_mem2p_initiate_transfer(dma_chan, dataptr, size * 9);
+ klogf("Post\n");
+
+ // for (;;);
}
+
#endif
diff --git a/src/kern/mem.c b/src/kern/mem.c
index 31756e5..aa221ff 100644
--- a/src/kern/mem.c
+++ b/src/kern/mem.c
@@ -44,16 +44,19 @@ typedef struct KALLOC_NODE {
uint8_t mem[]; /* The memory to use. */
} PACKED kalloc_node_t;
-kalloc_node_t* kalloc_start;
+#ifdef ARCH_PC
+typedef uint64_t ptrint_t;
+#else
+typedef uint32_t ptrint_t;
+#endif
-#define CANARY 0xdeadbeee
+#define CANARY ((uint32_t) 0xdeadbeee)
#define kalloc_node_in_use(node) ((node)->used_and_canary & 1)
#define kalloc_node_get_canary(node) ((node)->used_and_canary & (~1))
#define WORD_SIZE (sizeof(uint32_t))
#define SIZEOF_KALLOC_NODE_WORDS (sizeof(kalloc_node_t) / WORD_SIZE)
-#define HEAP_START_ADDR ((ptrdiff_t)&HEAP_START)
-#define REAL_HEAP_START \
- (*((unsigned char*)((HEAP_START_ADDR & (~3)) + (HEAP_START_ADDR % 4 != 0))))
+#define HEAP_START_ADDR ((ptrint_t)&HEAP_START)
+#define REAL_HEAP_START *(uint8_t*)(HEAP_START_ADDR + (4 - HEAP_START_ADDR % 4))
#define MAX_HEAP_SIZE ((&HEAP_STOP - &REAL_HEAP_START))
#define MAX_HEAP_SIZE_WORDS (MAX_HEAP_SIZE / WORD_SIZE)
#define kalloc_node_out_of_range(node) ((void*)(node) >= (void*)&HEAP_STOP)
@@ -74,6 +77,8 @@ kalloc_node_t* kalloc_start;
#define size_for(n) (((n) / 4) + ((n) % 4 != 0))
+kalloc_node_t* kalloc_start;
+
void kalloc_init()
{
kalloc_start = (kalloc_node_t*)&REAL_HEAP_START;
@@ -158,7 +163,8 @@ static void coalesce(kalloc_node_t* cur)
next_used->prev = kalloc_node_get_off(last_freed);
}
- last_freed->size_words = ((uint8_t*)next_used - (last_freed->mem)) / WORD_SIZE;
+ last_freed->size_words =
+ ((uint8_t*)next_used - (last_freed->mem)) / WORD_SIZE;
}
void kfree(void* mem)
diff --git a/src/kern/stdlibrepl.c b/src/kern/stdlibrepl.c
index 98142e2..588191b 100644
--- a/src/kern/stdlibrepl.c
+++ b/src/kern/stdlibrepl.c
@@ -1,3 +1,4 @@
+#include "arch.h"
/*
* Replacement for common stdlib functions that don't exist
* on the ARM bare-metal compilation environment.
@@ -11,3 +12,17 @@ size_t strlen(char* ch)
while (*(ch++) != 0) ++ret;
return ret;
}
+
+#ifdef ARCH_STM32L4
+
+void memcpy(void* dest, void* src, size_t size)
+{
+ uint8_t* dest_ = dest;
+ uint8_t* src_ = src;
+
+ while(size --) {
+ *(dest_++) = *(src_++);
+ }
+}
+
+#endif