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authorJosh Rahm <joshuarahm@gmail.com>2018-01-15 14:46:12 -0700
committerJosh Rahm <joshuarahm@gmail.com>2018-01-15 14:46:12 -0700
commit8e20f53dd3b33058508ff51bd19e49df19b06fb7 (patch)
tree9c8fa042aa57ebc94ad7e31519b243c3f00ff001 /system-clock/gpio.c
parent178921510fb527ef294b29b690ec2ac1ac696d8e (diff)
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reorganize sources into src and include directories.
Diffstat (limited to 'system-clock/gpio.c')
-rw-r--r--system-clock/gpio.c48
1 files changed, 0 insertions, 48 deletions
diff --git a/system-clock/gpio.c b/system-clock/gpio.c
deleted file mode 100644
index ab3606d..0000000
--- a/system-clock/gpio.c
+++ /dev/null
@@ -1,48 +0,0 @@
-#include "gpio.h"
-
-/*
- * Sets the mode of a pin on a gpio por.
- */
-void set_gpio_pin_mode(
- __IO gpio_port_t* gpio_port,
- gpio_pin_t pin,
- gpio_pin_mode_t mode)
-{
- /* Each pin has a 2-bit mode provided at bits pin#*2 and pin#*2+1 */
- gpio_port->mode_r &= ~(0x03 << pin * 2);
- gpio_port->mode_r |= mode << pin * 2;
-}
-
-
-gpio_output_pin_t set_gpio_pin_output(
- __IO gpio_port_t* gpio_port,
- gpio_pin_t pin)
-{
- set_gpio_pin_mode(gpio_port, pin, MODE_OUTPUT);
-
- return (gpio_output_pin_t) {
- .gpio_port = gpio_port,
- .pin = pin
- };
-}
-
-void set_gpio_output_pin(
- gpio_output_pin_t pin,
- bool onoff)
-{
- if (onoff) {
- pin.gpio_port->output_r |= 1 << pin.pin;
- } else {
- pin.gpio_port->output_r &= ~(1 << pin.pin);
- }
-}
-
-#define GPIO_PORTS_BASE_ADDR ((uint32_t)0x48000000)
-#define RCC_BASE ((uint32_t)0x40021000)
-#define RCC_AHB2ENR (*((__IO uint32_t*) (RCC_BASE + 0x4c)))
-__IO gpio_port_t* enable_gpio(gpio_port_number_t gpio_port_number)
-{
- RCC_AHB2ENR |= 1 << gpio_port_number; /* Enable the port. */
- return
- (__IO gpio_port_t*) (GPIO_PORTS_BASE_ADDR + (gpio_port_number * 0x400));
-}