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| author | Josh Rahm <joshuarahm@gmail.com> | 2020-11-24 14:03:19 -0700 |
|---|---|---|
| committer | Josh Rahm <joshuarahm@gmail.com> | 2020-11-24 14:03:19 -0700 |
| commit | 351ff7059a5bacb322664412a8c62ee4640b33bf (patch) | |
| tree | 53ef3fb16c5742c2edc45e633d80f6e16896f864 /tests/test_gpio.c | |
| parent | 6a1e0acc14b62c00317ac61c6ad6d8ffe441be4f (diff) | |
| download | stm32l4-351ff7059a5bacb322664412a8c62ee4640b33bf.tar.gz stm32l4-351ff7059a5bacb322664412a8c62ee4640b33bf.tar.bz2 stm32l4-351ff7059a5bacb322664412a8c62ee4640b33bf.zip | |
Update .clang-format and run it on filse
Diffstat (limited to 'tests/test_gpio.c')
| -rw-r--r-- | tests/test_gpio.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/tests/test_gpio.c b/tests/test_gpio.c index bcb953c..dd9c957 100644 --- a/tests/test_gpio.c +++ b/tests/test_gpio.c @@ -1,7 +1,6 @@ -#include "test_harness.h" - #include "arch/stm32l4xxx/peripherals/rcc.h" #include "kern/gpio/gpio_manager.h" +#include "test_harness.h" TEST(gpio_manager, smell) { @@ -46,7 +45,7 @@ TEST(gpio_manager, alternate) ASSERT_EQ(ec, 0); - gpio_port_config_t* gpioa = (gpio_port_config_t*) GPIOA_BASE; + gpio_port_config_t* gpioa = (gpio_port_config_t*)GPIOA_BASE; ASSERT_EQ(regget(gpioa->mode_r, gpio_mode_n(15)), GPIO_MODE_ALTERNATE); ASSERT_EQ(regget(gpioa->mode_r, gpio_mode_n(2)), GPIO_MODE_ALTERNATE); @@ -75,8 +74,7 @@ TEST(gpio_manager, bad_pin) int ec; /* Pretending to start the USART. */ - gpio_enable_alternate_function( - GPIO_ALTERNATE_FUNCTION_USART2_RX, 99, &ec); + gpio_enable_alternate_function(GPIO_ALTERNATE_FUNCTION_USART2_RX, 99, &ec); ASSERT_EQ(ec, GPIO_ERROR_INVALID_PIN); @@ -103,7 +101,6 @@ TEST(gpio_manager, alternate_then_reserve_fail) TEST(gpio_manager, get_gpio_pin_port_off) { - gpio_port_config_t* cfg; int off; get_gpio_pin_port_off(GPIO_PIN_PA5, &cfg, &off); @@ -127,12 +124,14 @@ TEST(gpio_manager, sets_gpio_settings) reserve_gpio_pin(GPIO_PIN_PA2, &opts, &ec); ASSERT_EQ(ec, 0); - gpio_port_config_t* gpioa = (gpio_port_config_t*) GPIOA_BASE; + gpio_port_config_t* gpioa = (gpio_port_config_t*)GPIOA_BASE; ASSERT_EQ(regget(gpioa->mode_r, gpio_mode_n(2)), GPIO_MODE_OUTPUT); ASSERT_EQ(regget(gpioa->pupd_r, gpio_pupd_n(2)), GPIO_PULL_DIR_NONE); - ASSERT_EQ(regget(gpioa->ospeed_r, gpio_ospeed_n(2)), GPIO_OUTPUT_SPEED_VERY_HIGH); - ASSERT_EQ(regget(gpioa->otype_r, gpio_otype_n(2)), GPIO_OUTPUT_TYPE_PUSH_PULL); + ASSERT_EQ( + regget(gpioa->ospeed_r, gpio_ospeed_n(2)), GPIO_OUTPUT_SPEED_VERY_HIGH); + ASSERT_EQ( + regget(gpioa->otype_r, gpio_otype_n(2)), GPIO_OUTPUT_TYPE_PUSH_PULL); return 0; } |