2 files changed, 39 insertions, 0 deletions
diff --git a/02-usart/include/arch/arm/arch.h b/02-usart/include/arch/arm/arch.h
new file mode 100644
index 0000000..904cbdb
--- /dev/null
+++ b/02-usart/include/arch/arm/arch.h
@@ -0,0 +1,20 @@
+#ifndef ARCH_H_
+#define ARCH_H_
+
+
+#define ARCH_STM32L4
+
+#define enable_interrupts() \
+  asm volatile(" cpsie i ")
+
+#define DMA1_BASE (0x40020000)
+#define DMA2_BASE (0x40020400)
+
+#define USART1_BASE (0x40013800)
+#define USART2_BASE (0x40004400)
+
+#define GPIOA_BASE (0x48000000)
+#define GPIOB_BASE (0x48000400)
+#define GPIOC_BASE (0x48000800)
+
+#endif /* ARCH_H_ */
diff --git a/02-usart/include/arch/x86_64/arch.h b/02-usart/include/arch/x86_64/arch.h
new file mode 100644
index 0000000..43f6077
--- /dev/null
+++ b/02-usart/include/arch/x86_64/arch.h
@@ -0,0 +1,19 @@
+#ifndef ARCH_H_
+#define ARCH_H_
+
+#include "fake_env.h"
+
+#define ARCH_PC
+#define enable_interrupts() do {} while(0)
+
+#define DMA1_BASE (load_fake_ahb1__() + 0x0)
+#define DMA2_BASE (load_fake_ahb1__() + 0x400)
+
+#define USART1_BASE (load_fake_apb2__() + 0x3800)
+#define USART2_BASE (load_fake_apb1__() + 0x4400)
+
+#define GPIOA_BASE (load_fake_ahb2__() + 0x0)
+#define GPIOB_BASE (load_fake_ahb2__() + 0x400)
+#define GPIOC_BASE (load_fake_ahb2__() + 0x800)
+
+#endif /* ARCH_H_ */