3 files changed, 121 insertions, 2 deletions
diff --git a/02-usart/include/common.h b/02-usart/include/common.h
index 8e0cb06..f9cbe06 100644
--- a/02-usart/include/common.h
+++ b/02-usart/include/common.h
@@ -5,6 +5,9 @@
 #include <stddef.h>
 #include <assert.h>
 
+#define WEAK __attribute__((weak))
+#define NORETURN __attribute__((noreturn))
+
 #ifndef static_assert
 #define static_assert(a, b)
 #endif
diff --git a/02-usart/include/isr_vector.h b/02-usart/include/isr_vector.h
index 3e55f52..7cb4596 100644
--- a/02-usart/include/isr_vector.h
+++ b/02-usart/include/isr_vector.h
@@ -1,6 +1,8 @@
 #ifndef h__ISR_VECTOR_H__
 #define h__ISR_VECTOR_H__
 
+#include <stdint.h>
+
 /*
  * Include file for interrupt service routines.
  */
@@ -9,12 +11,14 @@
  * The interrupt service routines. These link in the function `main` as the
  * main function.
  */
-extern const void* isr_vector[];
+extern const void* vectors[];
 
 /*
  * Defines an error state. This loops forever and defines a distinct flashing
  * pattern to let the user know an unhandled ISR happened.
  */
-void unhandled_isr();
+void unhandled_isr(uint8_t val);
+
+void isr_simple_pin_on();
 
 #endif /* h___ISR_VECTOR_H__ */
diff --git a/02-usart/include/isrs.i b/02-usart/include/isrs.i
new file mode 100644
index 0000000..cdb3889
--- /dev/null
+++ b/02-usart/include/isrs.i
@@ -0,0 +1,112 @@
+/*
+ * The following is a list of interrupts listed in a way
+ * that makes it easy to macro-process them by defining
+ * macro definitions for IRQ and IRQ_RESERVED alike followed
+ * by including this file.
+ */
+IRQ(on_reset, 1)
+IRQ(on_nmi, 2)
+IRQ(on_hard_fault, 3)
+IRQ(on_mem_manage, 4)
+IRQ(on_bus_fault, 5)
+IRQ(on_usage_fault, 6)
+IRQ_RESERVED(7)
+IRQ_RESERVED(8)
+IRQ_RESERVED(9)
+IRQ_RESERVED(10)
+IRQ(on_svc, 11)
+IRQ(on_debug_mon, 12)
+IRQ_RESERVED(13)
+IRQ(on_pendsv, 14)
+IRQ(on_systick, 15)
+IRQ(on_wwdg_irq, 16)
+IRQ(on_pvd_irq, 17)
+IRQ(on_tamper_stamp_irq, 18)
+IRQ(on_rtc_wkup_irq, 19)
+IRQ(on_flash_irq, 20)
+IRQ(on_rcc_irq, 21)
+IRQ(on_exti0_irq, 22)
+IRQ(on_exti1_irq, 23)
+IRQ(on_exti2_irq, 24)
+IRQ(on_exti3_irq, 25)
+IRQ(on_exti4_irq, 26)
+IRQ(on_dma1_channel1_irq, 27)
+IRQ(on_dma1_channel2_irq, 28)
+IRQ(on_dma1_channel3_irq, 29)
+IRQ(on_dma1_channel4_irq, 30)
+IRQ(on_dma1_channel5_irq, 31)
+IRQ(on_dma1_channel6_irq, 32)
+IRQ(on_dma1_channel7_irq, 33)
+IRQ(on_adc1_irq, 34)
+IRQ(on_can1_tx, 35)
+IRQ(on_can1_rx0, 36)
+IRQ(on_can1_rx1, 37)
+IRQ(on_can1_sce, 38)
+IRQ(on_exti9_5, 39)
+IRQ(on_tim1_brk, 40)
+IRQ(on_tim1_up, 41)
+IRQ(on_tim1_trg_com, 42)
+IRQ(on_tim1_cc, 43)
+IRQ(on_tim2, 44)
+IRQ(on_tim3, 45)
+IRQ(on_tim4, 46)
+IRQ(on_i2c1_ev, 47)
+IRQ(on_i2c1_er, 48)
+IRQ(on_i2c2_ev, 49)
+IRQ(on_i2c2_er, 50)
+IRQ(on_spi1, 51)
+IRQ(on_spi2, 52)
+IRQ(on_usart1, 53)
+IRQ(on_usart2, 54)
+IRQ(on_usart3, 55)
+IRQ(on_exti15_10, 56)
+IRQ(on_rtc_alarm, 57)
+IRQ(on_dfsdm1_flt3, 58)
+IRQ(on_tim8_brk, 59)
+IRQ(on_tim8_up, 60)
+IRQ(on_tim8_trg_com, 61)
+IRQ(on_tim8_cc, 62)
+IRQ(on_adc3, 63)
+IRQ(on_fmc, 64)
+IRQ(on_sdmmc1, 65)
+IRQ(on_tim5, 66)
+IRQ(on_spi3, 67)
+IRQ(on_uart4, 68)
+IRQ(on_uart5, 69)
+IRQ(on_tim6_dacunder, 70)
+IRQ(on_tim7, 71)
+IRQ(on_dma2_channel1, 72)
+IRQ(on_dma2_channel2, 73)
+IRQ(on_dma2_channel3, 74)
+IRQ(on_dma2_channel4, 75)
+IRQ(on_dma2_channel5, 76)
+IRQ(on_dfsdm1_flt0, 77)
+IRQ(on_dfsdm1_flt1, 78)
+IRQ(on_dfsdm1_flt2, 79)
+IRQ(on_comp, 80)
+IRQ(on_lptim1, 81)
+IRQ(on_lptim2, 82)
+IRQ(on_otg_fs, 83)
+IRQ(on_dma2_channel6, 84)
+IRQ(on_dma2_channel7, 85)
+IRQ(on_lpuart1, 86)
+IRQ(on_quadspi, 87)
+IRQ(on_i2c3_ev, 88)
+IRQ(on_i2c3_er, 89)
+IRQ(on_sai1, 90)
+IRQ(on_sai2, 91)
+IRQ(on_swpmi1, 92)
+IRQ(on_tsc, 93)
+IRQ(on_lcd, 94)
+IRQ(on_aes, 95)
+IRQ(on_rng, 96)
+IRQ(on_fpu, 97)
+IRQ(on_hash, 98)
+IRQ(on_i2c4_ev, 99)
+IRQ(on_i2c4_er, 100)
+IRQ(on_dcmi, 101)
+IRQ(on_can2_tx, 102)
+IRQ(on_can2_rx0, 103)
+IRQ(on_can2_rx1, 104)
+IRQ(on_can2_sce, 105)
+IRQ(on_dma2d, 106)