1 files changed, 40 insertions, 0 deletions
diff --git a/03-refactor/src/usart.c b/03-refactor/src/usart.c
index a64ad8b..76e93f1 100644
--- a/03-refactor/src/usart.c
+++ b/03-refactor/src/usart.c
@@ -1,6 +1,8 @@
 #include "usart.h"
 #include "delay.h"
 #include "printf.h"
+#include "gpio.h"
+#include "clock.h"
 
 void set_usart1_clock_src(__IO rcc_t* rcc, usart_clk_src_t usart_clk_src)
 {
@@ -89,3 +91,41 @@ void usart_printf(__IO usart_t* usart, const char* fmt, ...)
   printf_format(fmt, callback, closure, ap);
   va_end(ap);
 }
+
+int usart2_enabled = 0;
+int is_usart2_enabled() {
+  return usart2_enabled;
+}
+
+int enable_usart2(uint32_t baud_rate)
+{
+  __IO gpio_port_t* port_a = enable_gpio(GPIO_PORT_A);
+  enable_hsi(&RCC, true);
+
+  // Turn on the clock for the USART2 peripheral
+  set_usart2_clock_src(&RCC, USART_CLK_SRC_HSI16);
+  set_usart2_clock_enabled(&RCC, true);
+
+  // Configure the I/O pins.  Will use PA2 as TX and PA15 as RX so setup for
+  // alternate function
+  set_gpio_pin_mode(port_a, PIN_2, MODE_ALTERNATE);
+  set_gpio_pin_mode(port_a, PIN_15, MODE_ALTERNATE);
+  set_gpio_alternate_function(port_a, PIN_2, AFN_7);
+  set_gpio_alternate_function(port_a, PIN_15, AFN_3);
+
+  // De-assert reset of USART2
+  RCC.apb1rst1_r &= ~BIT(17);
+
+  // Configure the USART
+  // disable USART first to allow setting of other control bits
+  // This also disables parity checking and enables 16 times oversampling
+
+  USART2.c1.r = 0;
+  USART2.c2.r = 0;
+  USART2.c3.r = 0;
+
+  usart_set_divisor(&USART2, 16000000 / baud_rate);
+  usart_set_enabled(&USART2, USART_ENABLE_TX | USART_ENABLE_RX);
+
+  usart2_enabled = 1;
+}