diff options
| -rw-r--r-- | Makefile.preamble | 2 | ||||
| -rw-r--r-- | src/arch/stm32l4xxx/peripherals/irq.c | 8 | ||||
| -rw-r--r-- | src/kern/main.c | 4 | ||||
| -rw-r--r-- | src/kern/priv.c | 92 |
4 files changed, 97 insertions, 9 deletions
diff --git a/Makefile.preamble b/Makefile.preamble index f6e1370..b338833 100644 --- a/Makefile.preamble +++ b/Makefile.preamble @@ -2,7 +2,7 @@ OPT?=-O PREFIX?=arm-unknown-eabi- CC=$(PREFIX)gcc LD=$(PREFIX)ld -CFLAGS?=$(OPT) -mcpu=cortex-m4 -mthumb -g -lgcc -static -nostartfiles -Iinclude -Iinclude/arch/arm +CFLAGS?=$(OPT) -mcpu=cortex-m4 -mthumb -mimplicit-it -g -lgcc -static -nostartfiles -Iinclude -Iinclude/arch/arm LD_FLAGS?=-T linker/linker_script.ld -nostdlib --cref -Map linker/main.map -static TEST_PREFIX=x86_64-pc-linux-gnu- diff --git a/src/arch/stm32l4xxx/peripherals/irq.c b/src/arch/stm32l4xxx/peripherals/irq.c index e79d8ae..0313113 100644 --- a/src/arch/stm32l4xxx/peripherals/irq.c +++ b/src/arch/stm32l4xxx/peripherals/irq.c @@ -5,6 +5,8 @@ #include "arch/stm32l4xxx/peripherals/nvic.h" #include "kern/delay.h" #include "kern/gpio/gpio_manager.h" +#include "kern/init.h" +#include "kern/log.h" #define IRQ_RESERVED(n) #define IRQ(name, uname_, n) \ @@ -49,6 +51,12 @@ const void* vectors[] __attribute__((section(".vectors"))) = { */ void unhandled_isr(uint8_t number) { + if (get_system_init_level() > 2) { + /* If we have access to logging, just log the unhandled interrupt + * before contituing with the fancy flashing. */ + klogf("Unhandled ISR: %d\n", (int)number); + } + int ec; gpio_pin_opts_t opts = DEFAULT_GPIO_OPTS_OUTPUT; gpio_reserved_pin_t pin3 = reserve_gpio_pin(GPIO_PIN_PB3, &opts, &ec); diff --git a/src/kern/main.c b/src/kern/main.c index df2f0bf..4ed67be 100644 --- a/src/kern/main.c +++ b/src/kern/main.c @@ -133,7 +133,7 @@ int main() volatile int x; klogf("x location: %p\n", &x); - mpu_set_enabled(1); + // mpu_set_enabled(1); x = 5; klogf("Still alive?\n"); @@ -142,7 +142,7 @@ int main() enter_user_mode(); asm volatile ( - "svc #4\n" + "svc #21\n" ); klogf("Should Kernel Panic\n"); diff --git a/src/kern/priv.c b/src/kern/priv.c index 9d64005..085de85 100644 --- a/src/kern/priv.c +++ b/src/kern/priv.c @@ -1,5 +1,89 @@ #include "kern/priv.h" +#include "arch.h" +#include "kern/log.h" + +void handle_svc_call(uint32_t svc_number) +{ + klogf("Handle SVC: %p\n", svc_number); + for (;;) + ; +} + +asm(" .align 2\n" + " .global on_svc\n" + " .syntax unified\n" + " .fpu softvfp\n" + " .type on_svc, %function\n" + "on_svc:\n" + " tst lr,#4\n" + " ite eq\n" + " moveq r12,sp\n" + " mrsne r12,psp\n" + " ldr r12, [r12, #24]\n" + " ldrh r12, [r12, #-2]\n" + " bics r12, r12, #0xff00\n" + " push {r4, lr}\n" + " mov r0 , r12\n" + " bl handle_svc_call\n" + " pop {r4, lr}\n" + " tst lr, #4\n" + " ite eq\n" + " moveq r12,sp\n" + " mrsne r12,psp\n" + " stm r12,{r0-r3}\n" + " bx lr\n"); + +// void on_svc() // ISR handler. Override from weak symbol. +// { +// asm volatile( +// "push {r0-r12, lr}\n\t" +// "ldr r0, [lr, #-4]\n\t" +// "bic r0, r0, #0xff000000\n\t" +// ); + +// TST LR,#4 ; Called from Handler Mode? +// MRSNE R12,PSP ; Yes, use PSP +// MOVEQ R12,SP ; No, use MSP +// LDR R12,[R12,#24] ; Read Saved PC from Stack +// LDRH R12,[R12,#-2] ; Load Halfword +// BICS R12,R12,#0xFF00 ; Extract SVC Number +// uint32_t reg; +// asm volatile( +// "mov r12, sp\n\t" +// "ldr r12, [r12,#24]\n\t" +// // "ldrh r12,[r12, #-2]\n\t" +// // "bics r12, r12, #0xff00\n\t" +// "mov %0, r12\n\t": "=r"(reg)); + +// uint32_t base[0]; +// uint32_t reg; +// +// +// asm volatile("mov %0, sp\n\t" : "=r"(reg)); +// uint32_t* at = (uint32_t*) (reg + 44); /* Does GCC set up 5 stack frame +// words? */ +// +// klogf("Stack pointer: %p\n", reg); +// klogf("Stack pointer +44: %p\n", (reg + 44)); +// klogf("At_: %p: %p\n\n", 0x80009f6, *(uint32_t*)0x80009f6); +// klogf("At: %p: %p\n\n", at, *at); +// +// +// int i = 0; +// for (; i < 20 && &base[i] != (void*)STACK_TOP; ++ i) { +// kerr_logf(" (%p) %p\n", &base[i], base[i]); +// } +// +// // klogf("TEST %p\n", reg); +// +// for(;;); + +// register int svc_number asm ("r0"); + +// klogf("SVC #: %p\n", svc_number); +// } + void set_control_register(uint32_t reg) { asm volatile("msr control, %0" : "=r"(reg) :); @@ -14,11 +98,7 @@ uint32_t get_control_register() void enter_user_mode() { - asm volatile ( + asm volatile( "mov r0, #1\n\t" - "msr control, r0\n\t" - ); - - // uint32_t creg = get_control_register(); - // set_control_register(creg | 1); + "msr control, r0\n\t"); } |