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* Moved action to top level.Josh Rahm2020-11-24
| | | | | | Removed old iterations of the project and moved the files from 02-usart to the root directory since that's the sole place where the action is and that subproject has outgrown its initial title.
* Add new system for startup.Josh Rahm2020-11-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now instead of init() and main() being responsible for all initialization, individual modules can link in their own initialization routines. There are 7 levels for these initializiation routines. So far these are how the levels are defined level 0 - Here the world is dark. Nothing is initialized. This level is responsible for initializing the system clock. level 1 - The system clock has been configured, but nothing else. Not even global variables. This level is responsible for loading the data sections from flash and clearing the .bss section. level 2 - USART2 is enabled and set to be the main kernel logging vehicle. From this point on klogf(...) can be used. level 3 - The NVIC is reset to point to the flash. From this point on interrupts can be received. I expect this is where most core initialization routines will take place levels 4 to 7 - User initializiation levels. main - main() is called after all 8 initialization levels have executed, so in a sense main() is like a 9th initialization level, except that there is can be only one main() routine whereas there can be multiple initalization routines per level.
* add .ycm_extra_config and .gdb_initJosh Rahm2020-11-23
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* Add new GPIO subsystem.Josh Rahm2020-11-23
| | | | | | | | | | This gpio subsystem keeps track of the GPIO pins which have been reserved and takes care of the housekeeping with keeping them running. This gpio subsystem also knows which alternate functions belong to which pins, so it can automatically configure the pins for the alternate functions.
* Update the testing harness to insulate tests in --nofork mode.Josh Rahm2020-11-23
| | | | | | | | | | | | | Before, when running a test binary in --nofork mode, it was up to the test to reset the program state before exiting to avoid dependencies on other tests. Now after each test the test harness will: 1. Wipeout the fake environmennt. 2. Reset the data segment to its initialization state. This achieves reasonable insulation between tests even though certain things (like a segfault) are stil not practical to completely insulate without fork()'ing.
* Fixed diasterous bug with hfree.Josh Rahm2020-11-22
| | | | | | Before this fix, hfree would neglect to set the prev pointer in the next used block and such was leaving the prev pointers invalid after coalescing frees.
* Change test output to display the [PASS] before the test name.Josh Rahm2020-11-22
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* Large reorganization.Josh Rahm2020-11-22
| | | | | | | | | | | | | | | | | | | | | | What was in core/ is now moved to arch/stm34l4xxx/peripherals. This new directory is *supposed to* to contain raw header files defining just the pertinent register structures for the various peripherals. Peripheral management belongs somewhere in the new `kern/..` directories. This is not completely the case at the moment, so more refactoring needs to be done. What was sitting in the root has now been moved into the kern/ directory. The kern/ directory is to contain everything else other than raw device register definitions. The root of the kern/ tree is reserved for standard library-esque headers. The kern/<peripheral> directory contains management systems for that peripheral. (At the moment DMA is the only peripheral with a decent management system.) Preferably these peripheral systems should only include their correlating header in arch/stm34l4xxx/peripherals, and use other management systems for handling other peripherals rather than manipulating their raw registers directly. (Though this ideal will require much more critical mass of management systems.)
* Some comment-changes to mem.cJosh Rahm2020-11-21
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* Add the spi headers that define the SPI structure.Josh Rahm2020-11-21
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* Fix mem.c to use the address of DATA_SEGMENT_START instead of the valueJosh Rahm2020-11-21
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* Added halloc for allocating memory on the heap.Josh Rahm2020-11-21
| | | | | | | | | | | The new halloc() call allocates memory on the STM32l's SRAM2 starting right above the DATA section. The implementation uses a very-dense, albeit slower, linked-list allocation as opposed to fancy B-trees or something. However, the overhead is just 1 32-bit word per allocation and thus allows for reasonably dense memory-packing on the small 16K memory chip.
* Implemented DMA abstraction in the peri/dma.c source file.Josh Rahm2020-11-21
| | | | | This abstraction makes it much more intuitive to use the DMA features on the STM32L4 boards.
* Finally got a peripheral interrupt!Josh Rahm2020-11-20
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* Move around the isr_vector files to be more consistent with the C standard ↵Josh Rahm2020-11-20
| | | | and the rest of the project.
* Added NVIC definitionJosh Rahm2020-11-20
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* Change the SCB to use regset() macros.Josh Rahm2020-11-19
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* change rcc & usart to use the regtest() macros and.Josh Rahm2020-11-19
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* Change rcc.h to define regset() macros.Josh Rahm2020-11-18
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* Add regset masks to gpio.hJosh Rahm2020-11-18
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* Change dma.h over to a regset() strategy.Josh Rahm2020-11-18
| | | | | | Apparently people really don't like bitfields in practice, so I have devised a compromise to retain some readability while using bitmasks instead by writing a regset() macro.
* Reorganize some file. Put thte core register libraries in a core/Josh Rahm2020-11-18
| | | | subdirectory.
* A basic blink program that works off of interrupts.Josh Rahm2020-11-18
| | | | | | | | | | | - The init() function renamed to on_reset() - on_reset() now responsible for tight-looping at the end - on_reset() now set the VTable offset to the base of the FLASH - included exhaustive list of irqs in isrs.i - interrupt routines by default flash a code indicating their isr number. - interrupt routines are weak-linked allowing the programmer to override them at-will.
* add lib.h/lib.cJosh Rahm2020-11-18
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* Add primitive printf ability to usart.{h,c}.Josh Rahm2020-11-17
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* Add the System Control Block (SCB) in system.h.Josh Rahm2020-11-17
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* Changes to genmake.plJosh Rahm2020-11-17
| | | | | | | | - genmake.pl now handles generating the idempotency hash rather than relying on a less-portable bash command. - genmake.pl now recursively looks for *.c files in src/ and tests/ so the directory structure no longer needs to be flat.
* Got the DMA to send a simple message through UART2.Josh Rahm2020-11-16
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* Update the genmake script for tests.Josh Rahm2020-11-16
| | | | | | | | Update the genmake script to do the following: - Fix bug to link the object files from the source. - Test build output goes into a build/ directory. - Test makefile rules now run the test after building.
* Add DMA header file which defines the DMA registers and addJosh Rahm2020-11-16
| | | | | testing_harness with fake environment to allow testing on x86 development machines.
* rename folders to give notion of progressionJosh Rahm2018-01-23