| Commit message (Collapse) | Author | Age |
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These headers take inspiration from the linked list and array list
headers as a way to provide primitive templates in C. This time
they implement an AVL tree and Map template (which uses the AVL tree).
Included are relatively robust tests, though they could be improved.
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instead of 16 (with 8 leading 0's).
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I also found out that the noise in the lighhts was coming from the USB
debug interface. For whatever reason it doesn't appear that the spi pins
are not well isolated from the debugger noise so unplugging and running
off one power source works pretty well.
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I finally got a stable red/green pattern to show up on the LED strip.
Unfortunately I had to do this manually because my driver is broken. No
Dma, interrupts or drivers, but manually writing to the spi bus.
Currently the driver assums the data sheet doesn't lie and inflates each
bit 3:1 so a 1 is a 110 pattern and a 0 is a 100 pattern. This should be
well within the tolerances at 2.5Mhz, but alas it's not.
I figured out that it's better to inflate each bit to a 4:1 ratio so a 1
is a 1100 pattern and a 0 is a 1000 pattern. This appears to produce
cleaner results.
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Before this commit, the heap overlapped with the BSS, which predicatbly
broke everything once trying to use the heap.
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Bitfields are officially stupid. Bizzarre behavior was found in how the
bitfields integers were overflowing and causing other members to change
value, causing really screwy behavior. In addition, with the discovery
of 48k being available to the heap, a 12-bit value was no longer
sufficient to define the size.
I rewrote parts of the kalloc code to allow a generic size for the
kalloc header because now it'll require 2 words per block allocated,
and who knows what size the header will be on different platforms
with more memory.
Unfortunately, the second word of the header consists only of the "used"
bool. Because I wish to keep alignmennt with 32-bit words, 31 bits are
"wasted." However, these bits are used as a canary value to detect
heap corruption, so they're not completely wasted.
Also, testing was broken since adding the huge amount of platform
dependent code for doing system calls. These dependent parts were
put under a macro guard so they don't interfere with the x86 testing.
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This routine will has a newly allocated stack.
I found out that when using the st-flash utility it likes to reset the
device with the IPSR in HARD FAULT mode (?) so I have to manually hit
the reset button to get it to work.
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MPU in main() to actually work.
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The MPU is a module in arm chips which allow for memory access
protection. They are more primitive than full MMUs, but can still
provide at least basic access control between different process
controls.
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logging is initialized).
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linker script.
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Removed old iterations of the project and moved the files from 02-usart
to the root directory since that's the sole place where the action is
and that subproject has outgrown its initial title.
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Now instead of init() and main() being responsible for all
initialization, individual modules can link in their own
initialization routines.
There are 7 levels for these initializiation routines.
So far these are how the levels are defined
level 0 - Here the world is dark. Nothing is initialized.
This level is responsible for initializing the
system clock.
level 1 - The system clock has been configured, but nothing else. Not
even global variables. This level is responsible for loading
the data sections from flash and clearing the .bss section.
level 2 - USART2 is enabled and set to be the main kernel logging
vehicle. From this point on klogf(...) can be used.
level 3 - The NVIC is reset to point to the flash. From this point
on interrupts can be received. I expect this is where
most core initialization routines will take place
levels 4 to 7 - User initializiation levels.
main - main() is called after all 8 initialization levels have executed,
so in a sense main() is like a 9th initialization level, except
that there is can be only one main() routine whereas there can be
multiple initalization routines per level.
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This gpio subsystem keeps track of the GPIO pins which
have been reserved and takes care of the housekeeping
with keeping them running.
This gpio subsystem also knows which alternate functions
belong to which pins, so it can automatically configure
the pins for the alternate functions.
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Before, when running a test binary in --nofork mode, it was up to the
test to reset the program state before exiting to avoid dependencies on
other tests. Now after each test the test harness will:
1. Wipeout the fake environmennt.
2. Reset the data segment to its initialization state.
This achieves reasonable insulation between tests even though certain
things (like a segfault) are stil not practical to completely insulate
without fork()'ing.
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Before this fix, hfree would neglect to set the prev pointer in the next
used block and such was leaving the prev pointers invalid after
coalescing frees.
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What was in core/ is now moved to arch/stm34l4xxx/peripherals. This new
directory is *supposed to* to contain raw header files defining just the
pertinent register structures for the various peripherals. Peripheral
management belongs somewhere in the new `kern/..` directories. This is
not completely the case at the moment, so more refactoring needs to be
done.
What was sitting in the root has now been moved into the kern/
directory. The kern/ directory is to contain everything else
other than raw device register definitions. The root of the kern/
tree is reserved for standard library-esque headers.
The kern/<peripheral> directory contains management systems for that
peripheral. (At the moment DMA is the only peripheral with a decent
management system.) Preferably these peripheral systems should only
include their correlating header in arch/stm34l4xxx/peripherals, and
use other management systems for handling other peripherals rather
than manipulating their raw registers directly. (Though this ideal
will require much more critical mass of management systems.)
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The new halloc() call allocates memory on the
STM32l's SRAM2 starting right above the DATA
section.
The implementation uses a very-dense, albeit slower, linked-list
allocation as opposed to fancy B-trees or something. However, the
overhead is just 1 32-bit word per allocation and thus allows for
reasonably dense memory-packing on the small 16K memory chip.
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This abstraction makes it much more intuitive to use the
DMA features on the STM32L4 boards.
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and the rest of the project.
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