From 9f28e53c71d28d04e2775c59944d2887a99f1e86 Mon Sep 17 00:00:00 2001 From: Josh Rahm Date: Sun, 22 Nov 2020 01:06:30 -0700 Subject: Large reorganization. What was in core/ is now moved to arch/stm34l4xxx/peripherals. This new directory is *supposed to* to contain raw header files defining just the pertinent register structures for the various peripherals. Peripheral management belongs somewhere in the new `kern/..` directories. This is not completely the case at the moment, so more refactoring needs to be done. What was sitting in the root has now been moved into the kern/ directory. The kern/ directory is to contain everything else other than raw device register definitions. The root of the kern/ tree is reserved for standard library-esque headers. The kern/ directory contains management systems for that peripheral. (At the moment DMA is the only peripheral with a decent management system.) Preferably these peripheral systems should only include their correlating header in arch/stm34l4xxx/peripherals, and use other management systems for handling other peripherals rather than manipulating their raw registers directly. (Though this ideal will require much more critical mass of management systems.) --- 02-usart/tests/test_dma.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) (limited to '02-usart/tests/test_dma.c') diff --git a/02-usart/tests/test_dma.c b/02-usart/tests/test_dma.c index ce0c4ba..50cdb5b 100644 --- a/02-usart/tests/test_dma.c +++ b/02-usart/tests/test_dma.c @@ -1,8 +1,8 @@ #include "test_harness.h" -#include "core/dma.h" -#include "core/rcc.h" -#include "core/usart.h" -#include "peri/dma.h" +#include "arch/stm32l4xxx/peripherals/dma.h" +#include "arch/stm32l4xxx/peripherals/rcc.h" +#include "arch/stm32l4xxx/peripherals/usart.h" +#include "kern/dma/dma_manager.h" #include #include @@ -18,6 +18,7 @@ TEST(dma, smoke) regset(dma->is_r, dma_htif7, 1); ASSERT_EQ(dma->is_r, 67108866); + return 0; } TEST(dma, cc_regset) @@ -29,6 +30,7 @@ TEST(dma, cc_regset) regset(channel_config->cc_r, dma_cc_msize, DMA_SIZE_32_BITS); ASSERT_EQ(channel_config->cc_r, 1 << 11); + return 0; } TEST(dma, correct_align) @@ -52,6 +54,7 @@ TEST(dma, regset_pl) ASSERT_EQ( regget(reg, dma_cc_pl), DMA_PRIORITY_LEVEL_MEDIUM); + return 0; } TEST(dma_peri, select_peripheral) @@ -86,6 +89,7 @@ TEST(dma_peri, select_peripheral) release_dma_channel(chan.c_); ASSERT_EQ(regget(RCC.ahb1en_r, rcc_dma1en), 0); + return 0; } TEST(dma_peri, unable_to_realloc) @@ -119,6 +123,7 @@ TEST(dma_peri, unable_to_realloc) ASSERT_EQ(ec, 0); release_dma_channel(chan.c_); + return 0; } TEST(dma_peri, select_mem2mem) @@ -151,6 +156,7 @@ TEST(dma_peri, select_mem2mem) release_dma_channel(chan2.c_); release_dma_channel(chan3.c_); + return 0; } TEST(dma_peri, select_mem2mem_2) @@ -179,4 +185,5 @@ TEST(dma_peri, select_mem2mem_2) } release_dma_channel(chans[i].c_); } + return 0; } -- cgit