#include "arch.h"
#include "arch/arm/cortex-m4/mpu.h"
#include "arch/stm32l4xxx/peripherals/clock.h"
#include "arch/stm32l4xxx/peripherals/system.h"
#include "kern/init.h"
#include "kern/log.h"
#include "kern/mem.h"
#include "kern/mpu/mpu_manager.h"
#include "kern/panic.h"
#include "kern/priv.h"

void on_hard_fault()
{
  panic("Hard fault encountered!\n");
}

void on_systick() /* Overrides weak-symbol on_systick. */
{
  klogf("Systick\n");
}

#ifdef ARCH_STM32L4

int thing_in_sram_1;

/* Main function. This gets executed from the interrupt vector defined above. */
int main()
{
  klogf("Hello, World! Clock Mhz: %d\n", (uint32_t)get_clock_mhz());
  klogf("Heap Start: %p\n", &HEAP_START);
  klogf("Heap End  : %p\n", &HEAP_STOP);

  klogf("mpu: %p\n", &MPU);
  klogf("mpu.type_r: %p\n", MPU.type_r);
  klogf("mpu.ctrl_r: %p\n", MPU.ctrl_r);
  klogf("mpu.rn_r: %p\n", MPU.rn_r);

  thing_in_sram_1 = 0xdeadbeef;

  uint32_t control;
  asm volatile("mrs %0, control" : "=r"(control) :);

  /* Set the countdown to start from 10,000,0000. */
  SCB.strv_r = 10000000 / 20;

  /* Enable interrupts. */
  // regset(SCB.stcs_r, scb_tickint, 1);

  /* Start the systick. */
  regset(SCB.stcs_r, scb_enable, 1);


  klogf("&thing_in_sram_1: %p\n", &thing_in_sram_1);
  klogf(" thing_in_sram_1: %p\n", thing_in_sram_1);
  mpu_set_enabled(0);

  memory_region_opts_t memopts = { 0 };
  memopts.region = (void*) 0x08000000 /* Flash base */ ;
  memopts.bufferable = 0;
  memopts.cacheable = 1;
  memopts.sharable = 0;
  memopts.tex = 0;
  memopts.size = REGION_SIZE_256Kb;
  memopts.perms = ACCESS_PERMS_ONLY_PRIV_RO;
  memopts.subregion_disable = 0;
  memopts.executable = 1;
  memopts.enable = 1;

  mpu_configure_region(0, &memopts);

  memopts.region = (void*) SRAM1_BASE;
  memopts.bufferable = 0;
  memopts.cacheable = 1;
  memopts.sharable = 0;
  memopts.tex = 0;
  memopts.size = REGION_SIZE_64Kb;
  memopts.perms = ACCESS_PERMS_FULL;
  memopts.subregion_disable = 0;
  memopts.executable = 1;
  memopts.enable = 1;

  mpu_configure_region(1, &memopts);

  memopts.region = (void*) SRAM2_BASE;
  memopts.bufferable = 0;
  memopts.cacheable = 1;
  memopts.sharable = 0;
  memopts.tex = 0;
  memopts.size = REGION_SIZE_16Kb;
  memopts.perms = ACCESS_PERMS_FULL;
  memopts.subregion_disable = 0;
  memopts.executable = 1;
  memopts.enable = 1;

  mpu_configure_region(2, &memopts);

  memopts.region = (void*) 0x40000000 /* Peripheral base. */;
  memopts.bufferable = 1;
  memopts.cacheable = 0;
  memopts.sharable = 1;
  memopts.tex = 0;
  memopts.size = REGION_SIZE_512Mb;
  memopts.perms = ACCESS_PERMS_ONLY_PRIV;
  memopts.subregion_disable = 0;
  memopts.executable = 0;
  memopts.enable = 1;

  mpu_configure_region(3, &memopts);

  for (uint32_t i = 0; i < 8; ++ i) {
    MPU.rn_r = i;
    klogf("--- %d ---\n", i);
    klogf("mpu: %p\n", &MPU);
    klogf("mpu.type_r: %p\n", MPU.type_r);
    klogf("mpu.ctrl_r: %p\n", MPU.ctrl_r);
    klogf("mpu.rn_r: %p\n", MPU.rn_r);
    klogf("mpu.ras_r: %p\n", MPU.ras_r);
    klogf("mpu.rba_r: %p\n", MPU.rba_r);
  }

  // memopts.region = (void*) (SRAM1_BASE);
  // memopts.bufferable = 0;
  // memopts.cacheable = 1;
  // memopts.sharable = 1;
  // memopts.tex = 0;
  // memopts.size = REGION_SIZE_16Kb;
  // memopts.perms = ACCESS_PERMS_NO_ACCESS;

  klogf("CONTROL: %p\n", get_control_register());
  klogf("CONTROL: %p\n", get_control_register());
  klogf("MPU not enabled\n");

  volatile int x;
  klogf("x location: %p\n", &x);

  mpu_set_enabled(1);

  x = 5;
  klogf("Still alive?\n");

  klogf("Entering User Mode\n");
  enter_user_mode();

  asm volatile (
      "svc #4\n"
      );

  klogf("Should Kernel Panic\n");

  for(;;);
  // klogf("MPU enabled\n");

  // klogf("&thing_in_sram_1: %p\n", &thing_in_sram_1);
  // klogf(" thing_in_sram_1: %p\n", thing_in_sram_1);
}

#endif