blob: 2b992390d72dafa4feebfdae82c79c1ecb0c1017 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
|
#ifndef ARCH_H_
#define ARCH_H_
#include "fake_env.h"
#define ARCH_PC
#define enable_interrupts() do {} while(0)
#define DMA1_BASE (load_fake_ahb1__() + 0x0)
#define DMA2_BASE (load_fake_ahb1__() + 0x400)
#define USART1_BASE (load_fake_apb2__() + 0x3800)
#define USART2_BASE (load_fake_apb1__() + 0x4400)
#define GPIOA_BASE (load_fake_ahb2__() + 0x0)
#define GPIOB_BASE (load_fake_ahb2__() + 0x400)
#define GPIOC_BASE (load_fake_ahb2__() + 0x800)
#define SRAM1_BASE (load_fake_sram1__() + 0x0)
#define SRAM2_BASE (load_fake_sram2__() + 0x0)
#endif /* ARCH_H_ */
|
