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#include "arch.h"
#include "arch/arm/cortex-m4/mpu.h"
#include "arch/stm32l4xxx/peripherals/clock.h"
#include "arch/stm32l4xxx/peripherals/dma.h"
#include "arch/stm32l4xxx/peripherals/tim.h"
#include "arch/stm32l4xxx/peripherals/exti.h"
#include "arch/stm32l4xxx/peripherals/irq.h"
#include "arch/stm32l4xxx/peripherals/rcc.h"
#include "arch/stm32l4xxx/peripherals/spi.h"
#include "arch/stm32l4xxx/peripherals/syscfg.h"
#include "arch/stm32l4xxx/peripherals/system.h"
#include "drv/ws2812B/ws2812b.h"
#include "kern/delay.h"
#include "kern/dma/dma_manager.h"
#include "kern/gpio/gpio_manager.h"
#include "kern/gpio/sysled.h"
#include "kern/init.h"
#include "kern/log.h"
#include "kern/mem.h"
#include "kern/mpu/mpu_manager.h"
#include "kern/panic.h"
#include "kern/priv.h"
#include "kern/spi/spi_manager.h"
#include "kern/systick/systick_manager.h"
#include "user/syscall.h"
void on_exti9_5()
{
klogf("Exit Interrupt!\n");
klogf("Pending Reg_again: %p\n", EXTI.p_r1);
klogf("Write: %p\n", (1 << 6));
EXTI.p_r1 |= 1 << 6;
klogf("Pending Reg_again: %p\n", EXTI.p_r1);
}
void on_hard_fault()
{
panic("Hard fault encountered!\n");
}
#ifdef ARCH_STM32L4
void configure_gpio()
{
int ec = 0;
gpio_enable_alternate_function(
GPIO_ALTERNATE_FUNCTION_SPI1_MOSI, GPIO_PIN_PA7, &ec);
if (ec) {
panic("Unable to set pin PA7 (ec=%d)\n", ec);
}
gpio_enable_alternate_function(
GPIO_ALTERNATE_FUNCTION_SPI1_NSS, GPIO_PIN_PA4, &ec);
if (ec) {
panic("Unable to set pin PA4 (ec=%d)\n", ec);
}
gpio_enable_alternate_function(
GPIO_ALTERNATE_FUNCTION_SPI1_SCK, GPIO_PIN_PA5, &ec);
if (ec) {
panic("Unable to set pin PA5 (ec=%d)\n", ec);
}
}
static uint8_t* compiled;
static size_t compiled_len;
extern uint8_t sintable[256];
static uint32_t time;
static void on_systick(void* nil)
{
++time;
}
#define min(a, b) (a) < (b) ? (a) : (b)
static uint8_t amp(uint8_t in)
{
uint32_t out = in;
for (int i = 0; i < 20; ++i) {
out = (out * in) / 256;
}
return min(out, 255);
}
static uint32_t bytescale(uint32_t n, uint32_t sc)
{
return n * sc / 255;
}
void on_tim2()
{
if (regget(TIM2.s_r, tim_uif)) {
regset(TIM2.s_r, tim_uif, 0);
}
klogf("Tim2 Update\n");
}
/* Main function. This gets executed from the interrupt vector defined above. */
int main()
{
regset(RCC.apb2en_r, rcc_syscfgen, 1);
klogf("Entering main\n");
klogf("Enable ir\n");
enable_interrupt(IRQ_TIM2);
klogf("Enable clock\n");
regset(RCC.apb1en1_r, rcc_tim2en, 1);
klogf("psc\n");
TIM2.psc = 39999; /* Counts every half millisecond. */
klogf("ar_r\n");
TIM2.ar_r = 1000;
klogf("die_r\n");
regset(TIM2.die_r, tim_uie, 1);
klogf("eg_r\n");
regset(TIM2.eg_r, tim_ug, 1);
klogf("c_r1\n");
regset(TIM2.c_r1, tim_cen, 1);
int ec;
gpio_reserved_pin_t sysled = get_sysled();
gpio_pin_opts_t opts = DEFAULT_GPIO_OPTS_INPUT;
opts.pull_dir = GPIO_PULL_DIR_NONE;
gpio_reserved_pin_t pb6 = reserve_gpio_pin(GPIO_PIN_PB6, &opts, &ec);
if (ec) {
panic("Unable to reserve GPIO pin ec=%d\n", ec);
}
// while (1) {
// if (get_gpio_pin_input_state(pb6)) {
// set_gpio_pin_high(sysled);
// } else {
// set_gpio_pin_low(sysled);
// }
// // klogf("GPIO is set? %d\n", get_gpio_pin_input_state(pb6));
// }
regset(SYSCFG.extic_r2, syscfg_exti6, 1 /* Port B. */);
regset(EXTI.im_r1, exti_im_n(6), 1); /* Enable the EXTI interrupt. */
regset(EXTI.fts_r1, exti_ft_n(6), 1); /* Enable for falling edge. */
regset(EXTI.rts_r1, exti_rt_n(6), 1); /* Enable for rising edge. */
enable_interrupt(IRQ_EXTI9_5);
enable_interrupt(IRQ_EXTI0_IRQ);
enable_interrupt(IRQ_EXTI1_IRQ);
enable_interrupt(IRQ_EXTI2_IRQ);
enable_interrupt(IRQ_EXTI3_IRQ);
enable_interrupt(IRQ_EXTI4_IRQ);
for(;;);
}
#endif
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