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authorJosh Rahm <joshuarahm@gmail.com>2022-12-16 20:09:55 -0700
committerJosh Rahm <joshuarahm@gmail.com>2022-12-16 20:09:55 -0700
commit0eb6cb33982e2b00f5ffdedc300fa27ed4007967 (patch)
tree13ff1be38629293026baf1abfe939e790b808ad3 /goal.fiddle
downloadfiddle-0eb6cb33982e2b00f5ffdedc300fa27ed4007967.tar.gz
fiddle-0eb6cb33982e2b00f5ffdedc300fa27ed4007967.tar.bz2
fiddle-0eb6cb33982e2b00f5ffdedc300fa27ed4007967.zip
Initial commit with goal file in mind
Diffstat (limited to 'goal.fiddle')
-rw-r--r--goal.fiddle174
1 files changed, 174 insertions, 0 deletions
diff --git a/goal.fiddle b/goal.fiddle
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+// package for the GPIO system.
+package gpio {
+
+ location gpio_a_base = 0x4800_0000;
+ location gpio_b_base = 0x4800_0400;
+ location gpio_c_base = 0x4800_0400;
+
+ /** IO Data. This is just an expressive boolean. */
+ bittype data_t : enum(1) {
+ low = 0,
+ high = 1,
+ }
+
+ /**
+ * Structure of the GPIO port on an stm32l432
+ */
+ objtype gpio_t {
+ assert_pos(0);
+ reg (32) : {
+ /** The mode for each pin. */
+ mode_r : enum(2) {
+ /** The GPIO pin is used for input. */
+ input = 0b0,
+
+ /** The GPIO pin is used for general output. */
+ general_output = 0b1,
+
+ /**
+ * The GPIO pin is used for whatever the altername function
+ * is defined as (refer to manual).
+ */
+ alternate_function = 0b10,
+
+ /**
+ * The GPIO pin is set to analog.
+ */
+ analog = 0b11,
+ } [16];
+ };
+
+ /**
+ * The output type.
+ */
+ assert_pos(0x04);
+ reg (32) : {
+ otype_r : enum(1) {
+ /**
+ * The GPIO pin is capable of sinking to ground (for LOW) or providing
+ * power (for HIGH).
+ */
+ push_pull = 0,
+
+ /**
+ * The GPIO pin is only able to sink current (for LOW), or nothing (for
+ * HIGH).
+ */
+ open_drain = 1,
+ }[16];
+
+ reserved(16); // Have to pad out the remaining 16 bits.
+ };
+
+ /**
+ * Sets the speed of the provided GPIO pin.
+ */
+ assert_pos(0x08);
+ reg (32) : {
+ ospeed_r : enum(2) {
+ low = 0,
+ medium = 1,
+ high = 2,
+ very_high = 3,
+ } [16];
+ };
+
+ /**
+ * Pullup/Pulldown type
+ */
+ assert_pos(0x0c);
+ wo reg (32) : {
+ pupd_r : enum(2) {
+ none = 0b0,
+ // Compiles to Gpio::PupdR::PullUp
+ pull_up = 0b1,
+ // Compiles to Gpio::PupdR::PullDown
+ pull_down = 0b10,
+ // Not used, but has to be included to fill out the enum.
+ reserved = 0b11,
+ } [16];
+ };
+
+ /**
+ * Input data register.
+ *
+ * Reading form the provided pin will yield high if the pin is on, or low if
+ * the pin is low.
+ */
+ assert_pos(0x10);
+ ro reg (32) : {
+ id_r : data_t[16];
+ reserved(16);
+ };
+
+ /**
+ * Output data register.
+ *
+ * Writing to this register sets the appropriate register to low/high.
+ */
+ assert_pos(0x14);
+ wo reg (32) : {
+ rw od_r : data_t[16];
+ reserved(16);
+ };
+
+ /**
+ * The GPIO port bit set/reset register.
+ */
+ assert_pos(0x18);
+ reg bsr_r(32) : {
+ /**
+ * Sets the pins associated with the bits. Like od_r, but can be used to
+ * turn on multiple pins at once.
+ */
+ wo set : (16);
+
+ /**
+ * Resets the pins written to this register.
+ */
+ wo reset : (16);
+ };
+
+ assert_pos(0x1c);
+ reg(32) : {
+ lock : enum(1) {
+ unlocked = 0
+ locked = 1;
+ } [16];
+
+ lockk : (1);
+
+ reserved(15);
+ };
+
+ /**
+ * Alternate function registers (both low/high).
+ * Each nybble refers to a pin.
+ */
+ assert_pos(0x20);
+ reg(64) : {
+ afn : (4)[16];
+ }
+
+ /**
+ * The bit reset register.
+ */
+ assert_pos(0x28);
+ reg(32) : {
+ wo br_r : (16);
+ reserved (16);
+ }
+
+ /**
+ * Analog switch control for the pin.
+ */
+ reg(32) : {
+ asc_r : (16);
+ reserved (16);
+ }
+ }
+
+ object gpio_a at gpio_a_base : gpio_t;
+ object gpio_b at gpio_b_base : gpio_t;
+ object gpio_c at gpio_c_base : gpio_t;
+}