System clock is sort of working.

It appears the frequency divider does not work. I've followed the data
sheet, but no matter what I set the frequency divider to it appears to
not work. It's possible maybe the GPIO is using an un-divided clock, but
I'm not sure.

Also the 32khz clock does not work I think. It might be an issue with
the board. The waveform is jagged and looks awful.

But I can switch from the HSE to the PLL.

1 files changed, 14 insertions, 0 deletions

diff --git a/include/system.h b/include/system.h
new file mode 100644
index 0000000..ca29ade
--- /dev/null
+++ b/include/system.h
@@ -0,0 +1,14 @@
+#pragma once
+
+#include <stdint.h>
+
+#define SAFE_ACCESS_SIG_REG (*((volatile uint32_t*)0x40001040))
+
+#define SAFE_ACCESS_1 0x57
+#define SAFE_ACCESS_2 0xA8
+
+inline static void enter_safe_mode()
+{
+  SAFE_ACCESS_SIG_REG = SAFE_ACCESS_1;
+  SAFE_ACCESS_SIG_REG = SAFE_ACCESS_2;
+}