1 files changed, 97 insertions, 0 deletions
diff --git a/fdl/ch573/adc.fdl b/fdl/ch573/adc.fdl
new file mode 100644
index 0000000..bf7fcad
--- /dev/null
+++ b/fdl/ch573/adc.fdl
@@ -0,0 +1,97 @@
+/** Fiddle file for the analog to digital converter. */
+import "ch573/common.fdl";
+
+/** Package for the analog to diginal converter. */
+package ch573.adc {
+  location adc_base = 0x40001000;
+
+  using ch573.common;
+
+  type adc_t : struct {
+    reg (8) @ 0x58 : struct {
+       channel_select : (4);
+       reserved (4);
+    };
+
+    reg cfg(8) @0x59: struct {
+      adc_power_on : enable_t;
+      adc_buf_en : enable_t;
+      adc_diff_en : enable_t;
+
+      ofs_test : enum (1) {
+        [[ c: unqualified ]]
+        OFFSET_TEST_NORMAL = 0,
+        [[ c: unqualified ]]
+        OFFSET_TEST_CALIBRATE = 1,
+      };
+
+      pga_gain : enum (2) {
+       [[ c: unqualified ]]
+        GAIN_DIV_4 = 0,
+       [[ c: unqualified ]]
+        GAIN_DIV_2 = 1,
+       [[ c: unqualified ]]
+        GAIN_NONE = 2,
+       [[ c: unqualified ]]
+        GAIN_MUL_2 = 3,
+      };
+
+      clock_div : enum (2) {
+       [[ c: unqualified ]]
+        CK32M_DIV_10 = 0,
+       [[ c: unqualified ]]
+        CK32M_DIV_4 = 1,
+       [[ c: unqualified ]]
+        CK32M_DIV_6 = 2,
+       [[ c: unqualified ]]
+        CK32M_DIV_8 = 3,
+      };
+    };
+
+    reg convert(8) @0x5A : struct {
+      adc_start : bit_t;
+      reserved(6);
+      eoc_x : bit_t;
+    };
+
+    reg tem_sensor(8) @0x5B : struct {
+      pwr : enable_t;
+      reserved(7);
+    };
+
+    ro reg data(16) @0x5C : struct {
+      ro data_12 : (12);
+      reserved(4);
+    };
+
+    ro reg interrupt_flag(8) @0x5E : struct {
+      reserved(7);
+      ro if_eoc : (1);
+    };
+
+    reg dma_interrupt_control(8) @0x61 : struct {
+      auto_en : enable_t;
+      reserved(2);
+      ie_eoc : enable_t;
+      ie_dma_end : enable_t;
+      dma_loop : enable_t;
+      reserved(1);
+      dma_enable : enable_t;
+    };
+
+    reg dma_interrupt_flag(8) @0x62 : struct {
+      reserved(3);
+      if_dma_end : bit_t;
+      if_end_adc : bit_t;
+      reserved(3);
+    };
+
+    reg auto_cycle(8) @0x63;
+
+    reg dma_now(16) @0x64;
+    reg dma_beg(16) @0x68;
+    reg dma_end(16) @0x6C;
+  };
+
+  instance adc at adc_base : adc_t;
+};