blob: 08e1901d8ff68ca39a8a2513511dd564be23ca93 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
|
ENTRY(_begin)
MEMORY
{
flash : org = 0x00000000, len = 512k
sram : org = 0x20003800, len = 18k
}
SECTIONS
{
. = ORIGIN(flash);
.text : ALIGN(0x04) {
*(.sinit);
*(.sinit.1);
/* The ch573 starts execution at address 0x0000, so we have to make sure the
* on_reset function is put at the beginning of the flash. */
KEEP(*(.isr_routines.on_reset));
/* The rest of the code. */
*(.text);
*(.text.*);
} >flash AT>flash
.rodata : ALIGN(0x04) {
*(.rodata);
*(.rodata.*);
*(.srodata);
*(.srodata.*);
} > flash AT>flash
.clock_change_listeners : ALIGN(0x04) {
CLOCK_CHANGE_LISTENERS_START = .;
KEEP(*(.clock_change_listeners));
CLOCK_CHANGE_LISTENERS_END = .;
} > flash AT>flash
.systick_callbacks : ALIGN(0x04) {
SYSTICK_LISTENERS_START = .;
KEEP(*(.systick_callbacks));
SYSTICK_LISTENERS_END = .;
} > flash AT>flash
ISR_VECTOR_IN_FLASH = LOADADDR(.isr_vector);
.isr_vector : ALIGN(0x04) {
ISR_VECTOR_START = .;
KEEP(*(.isr_vector))
KEEP(*(.isr_vector.routines))
ISR_VECTOR_STOP = .;
} >sram AT>flash
DATA_VALUES_IN_FLASH = LOADADDR(.data);
.data : ALIGN(0x04) {
. = ALIGN(0x04);
DATA_SEGMENT_START = .;
*(.data);
*(.data.*);
*(.sdata);
*(.sdata.*);
. = ALIGN(0x04);
DATA_SEGMENT_STOP = .;
} >sram AT>flash
.bss : ALIGN(0x04) {
. = ALIGN(0x04);
BSS_START = .;
*(.bss);
*(.sbss);
BSS_STOP = .;
HEAP_START = .;
} >sram
}
|
