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author | Josh Rahm <joshuarahm@gmail.com> | 2020-11-23 19:41:05 -0700 |
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committer | Josh Rahm <joshuarahm@gmail.com> | 2020-11-23 19:41:05 -0700 |
commit | 60b1e3055c179312eef809fe1d01f58042b64d5f (patch) | |
tree | c620b5ca1eab2d05c9396637db50d0a110328d29 /02-usart/src/arch/stm32l4xxx/peripherals/irq.c | |
parent | 2a6ae24ba769892993ec7a173c564f59feb06495 (diff) | |
download | stm32l4-60b1e3055c179312eef809fe1d01f58042b64d5f.tar.gz stm32l4-60b1e3055c179312eef809fe1d01f58042b64d5f.tar.bz2 stm32l4-60b1e3055c179312eef809fe1d01f58042b64d5f.zip |
Add new GPIO subsystem.
This gpio subsystem keeps track of the GPIO pins which
have been reserved and takes care of the housekeeping
with keeping them running.
This gpio subsystem also knows which alternate functions
belong to which pins, so it can automatically configure
the pins for the alternate functions.
Diffstat (limited to '02-usart/src/arch/stm32l4xxx/peripherals/irq.c')
-rw-r--r-- | 02-usart/src/arch/stm32l4xxx/peripherals/irq.c | 26 |
1 files changed, 15 insertions, 11 deletions
diff --git a/02-usart/src/arch/stm32l4xxx/peripherals/irq.c b/02-usart/src/arch/stm32l4xxx/peripherals/irq.c index 8fb3e49..364b9a7 100644 --- a/02-usart/src/arch/stm32l4xxx/peripherals/irq.c +++ b/02-usart/src/arch/stm32l4xxx/peripherals/irq.c @@ -4,6 +4,7 @@ #include "arch.h" #include "kern/delay.h" +#include "kern/gpio/gpio_manager.h" #define IRQ_RESERVED(n) #define IRQ(name, uname_, n) \ @@ -16,10 +17,11 @@ void isr_simple_pin_on() { - __IO gpio_port_t* port_b = enable_gpio(GPIO_PORT_B); - gpio_output_pin_t pin3 = set_gpio_pin_output(port_b, PIN_3); + int ec; + gpio_pin_opts_t opts = DEFAULT_GPIO_OPTS_OUTPUT; + gpio_reserved_pin_t pin3 = reserve_gpio_pin(GPIO_PIN_PB3, &opts, &ec); - pin_on(pin3); + set_gpio_pin_high(pin3); } #define IRQ_RESERVED(n) 0, @@ -47,13 +49,15 @@ const void* vectors[] __attribute__((section(".vectors"))) = { */ void unhandled_isr(uint8_t number) { - __IO gpio_port_t* port_b = enable_gpio(GPIO_PORT_B); - gpio_output_pin_t pin3 = set_gpio_pin_output(port_b, PIN_3); + int ec; + gpio_pin_opts_t opts = DEFAULT_GPIO_OPTS_OUTPUT; + gpio_reserved_pin_t pin3 = reserve_gpio_pin(GPIO_PIN_PB3, &opts, &ec); + for (;;) { for (int i = 0; i < 20; ++ i) { - pin_on(pin3); + set_gpio_pin_high(pin3); delay(1000000); - pin_off(pin3); + set_gpio_pin_low(pin3); delay(1000000); } delay(50000000); @@ -62,15 +66,15 @@ void unhandled_isr(uint8_t number) for (int i = 0; i < 8; ++ i) { if (n & 1) { // LSB is a 1 - pin_on(pin3); + set_gpio_pin_high(pin3); delay(15000000); - pin_off(pin3); + set_gpio_pin_low(pin3); delay(15000000); } else { // LSB is a 0 - pin_on(pin3); + set_gpio_pin_high(pin3); delay(1000000); - pin_off(pin3); + set_gpio_pin_low(pin3); delay(29000000); } |