diff options
Diffstat (limited to '02-usart/src/main.c')
| -rw-r--r-- | 02-usart/src/main.c | 34 |
1 files changed, 30 insertions, 4 deletions
diff --git a/02-usart/src/main.c b/02-usart/src/main.c index 5f45e0b..b4f7dd7 100644 --- a/02-usart/src/main.c +++ b/02-usart/src/main.c @@ -1,4 +1,7 @@ +#include "string.h" +#include "mem.h" +#include "dma.h" #include "arch.h" #include "clock.h" #include "delay.h" @@ -8,7 +11,7 @@ volatile uint32_t delay_amt = 20000000 / 4; -int enable_usart2(uint32_t baud_rate) +int setup_usart2(uint32_t baud_rate) { __IO gpio_port_t* port_a = enable_gpio(GPIO_PORT_A); enable_hsi(&RCC, true); @@ -36,7 +39,6 @@ int enable_usart2(uint32_t baud_rate) USART2.c_r3 = 0; usart_set_divisor(&USART2, 16000000 / baud_rate); - usart_set_enabled(&USART2, USART_ENABLE_TX | USART_ENABLE_RX); } int enable_usart1(uint32_t baud_rate) @@ -88,10 +90,34 @@ int main() /* Enable a higher clock frequency. */ set_system_clock_MHz(80); - enable_usart2(115200); + setup_usart2(115200); + + + char* into = (char*) (SRAM1_BASE + 50); + const char* hello = "Hello, Chester Cheeto!\r\n"; + int len = strlen(hello); + memcpy(into, hello, len + 1); + + usart_enable_dma(&USART2, USART_ENABLE_TX); + usart_set_enabled(&USART2, USART_ENABLE_TX | USART_ENABLE_RX); + + pin_on(pin3); + + RCC.ahb1en_bf.dma1en = 1; /* Enable DMA1 Clock. */ + DMA1.csel_bf.c7s = 0x2; /* Select USART2_TX for the sel. */ + DMA1.channel_config[6].cc_r = 0; + DMA1.channel_config[6].cc_bf.dir = READ_FROM_MEMORY; + DMA1.channel_config[6].cc_bf.minc = 1; + DMA1.channel_config[6].cc_bf.pl = DMA_PRIORITY_LEVEL_VERY_HIGH; + DMA1.channel_config[6].cndt_bf.ndt = len; + DMA1.channel_config[6].cpa_r = ptr2reg(&USART2.td_r); + DMA1.channel_config[6].cma_r = ptr2reg(into); + + USART2.ic_bf.tccf = 1; + DMA1.channel_config[6].cc_bf.en = 1; pin_on(pin3); - usart_transmit_str_sync(&USART2, "Hello, World\n"); + // usart_transmit_str_sync(&USART2, into); for(;;); } |