aboutsummaryrefslogtreecommitdiff
path: root/02-usart/include/arch
Commit message (Collapse)AuthorAge
* Moved action to top level.Josh Rahm2020-11-24
| | | | | | Removed old iterations of the project and moved the files from 02-usart to the root directory since that's the sole place where the action is and that subproject has outgrown its initial title.
* Add new system for startup.Josh Rahm2020-11-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now instead of init() and main() being responsible for all initialization, individual modules can link in their own initialization routines. There are 7 levels for these initializiation routines. So far these are how the levels are defined level 0 - Here the world is dark. Nothing is initialized. This level is responsible for initializing the system clock. level 1 - The system clock has been configured, but nothing else. Not even global variables. This level is responsible for loading the data sections from flash and clearing the .bss section. level 2 - USART2 is enabled and set to be the main kernel logging vehicle. From this point on klogf(...) can be used. level 3 - The NVIC is reset to point to the flash. From this point on interrupts can be received. I expect this is where most core initialization routines will take place levels 4 to 7 - User initializiation levels. main - main() is called after all 8 initialization levels have executed, so in a sense main() is like a 9th initialization level, except that there is can be only one main() routine whereas there can be multiple initalization routines per level.
* Add new GPIO subsystem.Josh Rahm2020-11-23
| | | | | | | | | | This gpio subsystem keeps track of the GPIO pins which have been reserved and takes care of the housekeeping with keeping them running. This gpio subsystem also knows which alternate functions belong to which pins, so it can automatically configure the pins for the alternate functions.
* Large reorganization.Josh Rahm2020-11-22
| | | | | | | | | | | | | | | | | | | | | | What was in core/ is now moved to arch/stm34l4xxx/peripherals. This new directory is *supposed to* to contain raw header files defining just the pertinent register structures for the various peripherals. Peripheral management belongs somewhere in the new `kern/..` directories. This is not completely the case at the moment, so more refactoring needs to be done. What was sitting in the root has now been moved into the kern/ directory. The kern/ directory is to contain everything else other than raw device register definitions. The root of the kern/ tree is reserved for standard library-esque headers. The kern/<peripheral> directory contains management systems for that peripheral. (At the moment DMA is the only peripheral with a decent management system.) Preferably these peripheral systems should only include their correlating header in arch/stm34l4xxx/peripherals, and use other management systems for handling other peripherals rather than manipulating their raw registers directly. (Though this ideal will require much more critical mass of management systems.)
* Add the spi headers that define the SPI structure.Josh Rahm2020-11-21
|
* Fix mem.c to use the address of DATA_SEGMENT_START instead of the valueJosh Rahm2020-11-21
|
* Added halloc for allocating memory on the heap.Josh Rahm2020-11-21
| | | | | | | | | | | The new halloc() call allocates memory on the STM32l's SRAM2 starting right above the DATA section. The implementation uses a very-dense, albeit slower, linked-list allocation as opposed to fancy B-trees or something. However, the overhead is just 1 32-bit word per allocation and thus allows for reasonably dense memory-packing on the small 16K memory chip.
* Implemented DMA abstraction in the peri/dma.c source file.Josh Rahm2020-11-21
| | | | | This abstraction makes it much more intuitive to use the DMA features on the STM32L4 boards.
* Finally got a peripheral interrupt!Josh Rahm2020-11-20
|
* Added NVIC definitionJosh Rahm2020-11-20
|
* Add the System Control Block (SCB) in system.h.Josh Rahm2020-11-17
|
* Got the DMA to send a simple message through UART2.Josh Rahm2020-11-16
|
* Add DMA header file which defines the DMA registers and addJosh Rahm2020-11-16
testing_harness with fake environment to allow testing on x86 development machines.