Add DMA header file which defines the DMA registers and add

testing_harness with fake environment to allow testing on x86
development machines.

1 files changed, 6 insertions, 6 deletions

diff --git a/02-usart/src/usart.c b/02-usart/src/usart.c
index eddfbe7..42297a8 100644
--- a/02-usart/src/usart.c
+++ b/02-usart/src/usart.c
@@ -51,7 +51,7 @@ void usart_set_enabled(__IO usart_t* usart, usart_enable_t enabled)
   }
 }
 
-void usart_transmit_byte(__IO usart_t* usart, uint8_t byte)
+void usart_transmit_byte_sync(__IO usart_t* usart, uint8_t byte)
 {
   usart->td_r = byte;
   /* Per the manual, when bit 7 of the IS register is set, then the usart
@@ -62,19 +62,19 @@ void usart_transmit_byte(__IO usart_t* usart, uint8_t byte)
     ;
 }
 
-void usart_transmit_bytes(__IO usart_t* usart, const uint8_t* bytes, uint32_t n)
+void usart_transmit_bytes_sync(__IO usart_t* usart, const uint8_t* bytes, uint32_t n)
 {
   while (n --) {
-    usart_transmit_byte(usart, *(bytes ++));
+    usart_transmit_byte_sync(usart, *(bytes ++));
   }
 }
 
-void usart_transmit_str(__IO usart_t* usart, const char* str)
+void usart_transmit_str_sync(__IO usart_t* usart, const char* str)
 {
   while (*str) {
     if (*str == '\n') {
-      usart_transmit_byte(usart, '\r');
+      usart_transmit_byte_sync(usart, '\r');
     }
-    usart_transmit_byte(usart, *(str ++));
+    usart_transmit_byte_sync(usart, *(str ++));
   }
 }