Moved action to top level.

Removed old iterations of the project and moved the files from 02-usart
to the root directory since that's the sole place where the action is
and that subproject has outgrown its initial title.

9 files changed, 0 insertions, 902 deletions

diff --git a/03-refactor/src/clock.c b/03-refactor/src/clock.c
deleted file mode 100644
index 7256500..0000000
--- a/03-refactor/src/clock.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * This file sets the system clock to its full glory of 80Mhz
- */
-
-#include "clock.h"
-#include <stdint.h>
-#include "flash.h"
-#include "gpio.h"
-#include "spin.h"
-
-#define TIMEOUT 10000
-
-int pll_off()
-{
-  uint32_t c;
-
-  RCC.c.pllon = false;
-  for (c = 0; c < TIMEOUT && RCC.c.pllrdy; ++c)
-    ; /* Wait for OFF. */
-
-  if (c == TIMEOUT) {
-    return E_TIMEOUT;
-  }
-
-  return 0;
-}
-
-int pll_on()
-{
-  uint32_t c;
-
-  RCC.c.pllon = true;
-  for (c = 0; c < TIMEOUT && !RCC.c.pllrdy; ++c)
-    ; /* Wait for RDY. */
-
-  if (c == TIMEOUT) {
-    return E_TIMEOUT;
-  }
-
-  return 0;
-}
-
-int configure_pll(
-    uint8_t pllp_div_factor, pll_divisor_t pllr, /* System clock divisor. */
-    pll_divisor_t pllq,  /* Divison factor for PLL48M1CLK. */
-    pllp_divisor_t pllp, /* Divison factor for PLLSAI2CLK. */
-    uint8_t plln,        /* PLL numerator. */
-    pllm_divisor_t pllm, /* PLL denominator. */
-    pll_src_t pllsrc /* PLL source */)
-{
-  if (RCC.c.pllrdy) {
-    /* PLL must be off to configure it. */
-    return E_NOT_OFF;
-  }
-
-  /* Make sure inputs are valid. */
-  if (pllp_div_factor == 1 || pllp_div_factor > 31) {
-    return E_BADPLLP_DIV;
-  }
-  if (plln < 8 || plln > 86) {
-    return E_BADPLLN;
-  }
-
-  union RCC_PLLCFGR tmp;
-
-  tmp.pllpdiv = pllp_div_factor;
-  tmp.pllr = pllr >> 1;
-  tmp.pllren = pllr & 1;
-  tmp.pllp = pllp >> 1;
-  tmp.pllpen = pllp & 1;
-  tmp.pllq = pllq >> 1;
-  tmp.pllqen = pllq & 1;
-  tmp.plln = plln;
-  tmp.pllm = pllm;
-
-  tmp.pllsrc = pllsrc;
-
-  RCC.pllcfg = tmp;
-
-  return 0;
-}
-
-int set_system_clock_MHz(uint8_t mhz)
-{
-  /* Set the source of the system colck to MSI temporarily. */
-  set_system_clock_src(SYSTEM_CLOCK_SRC_MSI);
-
-  if (mhz <= 8 || mhz > 80) {
-    return E_BAD_ARG;
-  }
-
-  pll_off();
-
-  configure_pll(
-      0,
-      PLL_DIVISOR_4,
-      PLL_DIVISOR_4,
-      PLLP_DIVISOR_7,
-      mhz,
-      PLLM_DIVISOR_1,
-      PLL_SRC_MSI);
-
-  pll_on();
-
-  /* Configure the flash to have 4 wait states. This is required at
-   * 80 MHz. */
-  FLASH.ac_r &= ~0x07;
-  FLASH.ac_r |= 0x04;
-
-  /* Set the source of the system colck to PLL. */
-  set_system_clock_src(SYSTEM_CLOCK_SRC_PLL);
-  return 0;
-}
-
-int set_system_clock_src(system_clock_src_t src)
-{
-  uint8_t value = RCC.cfg.r & ~0x03;
-  RCC.cfg.r = value | src;
-}
-
-int enable_hsi(__IO rcc_t* rcc, bool enable)
-{
-  uint32_t c;
-  rcc->c.hsion = !!enable;
-  for(c = 0; c < TIMEOUT && !rcc->c.hsirdy; ++ c)
-    ;
-  if (c == TIMEOUT) {
-    return E_TIMEOUT;
-  }
-  return 0;
-}
diff --git a/03-refactor/src/delay.c b/03-refactor/src/delay.c
deleted file mode 100644
index 2a16d47..0000000
--- a/03-refactor/src/delay.c
+++ /dev/null
@@ -1,9 +0,0 @@
-#include "delay.h"
-
-void delay(uint32_t delay)
-{
-  while (delay--) {
-    /* needed to keep the compiler from optimizing away the loop. */
-    asm volatile("");
-  }
-}
diff --git a/03-refactor/src/gpio.c b/03-refactor/src/gpio.c
deleted file mode 100644
index 02933b7..0000000
--- a/03-refactor/src/gpio.c
+++ /dev/null
@@ -1,52 +0,0 @@
-#include "gpio.h"
-#include "rcc.h"
-
-/*
- * Sets the mode of a pin on a gpio por.
- */
-void set_gpio_pin_mode(
-    __IO gpio_port_t* gpio_port, gpio_pin_t pin, gpio_pin_mode_t mode)
-{
-  /* Each pin has a 2-bit mode provided at bits pin#*2 and pin#*2+1 */
-  gpio_port->mode_r &= ~(0x03 << pin * 2);
-  gpio_port->mode_r |= mode << pin * 2;
-}
-
-gpio_output_pin_t set_gpio_pin_output(
-    __IO gpio_port_t* gpio_port, gpio_pin_t pin)
-{
-  set_gpio_pin_mode(gpio_port, pin, MODE_OUTPUT);
-
-  return (gpio_output_pin_t){.gpio_port = gpio_port, .pin = pin};
-}
-
-void set_gpio_output_pin(gpio_output_pin_t pin, bool onoff)
-{
-  if (onoff) {
-    pin.gpio_port->output_r |= 1 << pin.pin;
-  } else {
-    pin.gpio_port->output_r &= ~(1 << pin.pin);
-  }
-}
-
-void set_gpio_alternate_function(
-    __IO gpio_port_t* port, gpio_pin_t gpio_pin, alternate_function_t afn)
-{
-  __IO uint32_t* reg;
-  if (gpio_pin < 8) {
-    reg = &(port->af_rl);
-  } else {
-    reg = &(port->af_rh);
-    gpio_pin -= 8;
-  }
-
-  uint32_t tmp = *reg & (~0x0f << gpio_pin * 4);
-  *reg = tmp | (afn << gpio_pin * 4);
-}
-
-#define GPIO_PORTS_BASE_ADDR ((uint8_t*)0x48000000)
-__IO gpio_port_t* enable_gpio(gpio_port_number_t gpio_port_number)
-{
-  RCC.ahb2en_r |= 1 << gpio_port_number; /* Enable the GPIO port. */
-  return (__IO gpio_port_t*)(GPIO_PORTS_BASE_ADDR + (gpio_port_number * 0x400));
-}
diff --git a/03-refactor/src/isr_vector.c b/03-refactor/src/isr_vector.c
deleted file mode 100644
index f757ebe..0000000
--- a/03-refactor/src/isr_vector.c
+++ /dev/null
@@ -1,275 +0,0 @@
-#include "isr_vector.h"
-#include "delay.h"
-#include "gpio.h"
-#include "usart.h"
-
-/* Forward-declare the main function. This is implemented in main.c. */
-void main();
-
-/* These are defined in the linker script. */
-extern uint32_t INIT_DATA_VALUES;
-extern uint32_t DATA_SEGMENT_START;
-extern uint32_t DATA_SEGMENT_STOP;
-extern uint32_t BSS_START;
-extern uint32_t BSS_END;
-
-/*
- * Runs before main. Initializes the data and bss segments by loading them
- * into memory.
- */
-void init()
-{
-  uint32_t* src;
-  uint32_t* dest;
-
-  src = &INIT_DATA_VALUES;
-  dest = &DATA_SEGMENT_START;
-
-  /* Copy the values from flash into the data segment. */
-  while (dest != &DATA_SEGMENT_STOP) {
-    *(dest++) = *(src++);
-  }
-
-  /* Everything in the BSS segment is set to zero. */
-  dest = &BSS_START;
-  while (dest != &BSS_END) {
-    *(dest++) = 0;
-  }
-
-  /* Jump to main. */
-  main();
-}
-
-#define DEF_HANDLER(n) \
-  void unhandled_isr_ ## n() { \
-    unhandled_isr(n); \
-  }
-
-DEF_HANDLER(1)
-DEF_HANDLER(2)
-DEF_HANDLER(3)
-DEF_HANDLER(4)
-DEF_HANDLER(5)
-DEF_HANDLER(6)
-DEF_HANDLER(7)
-DEF_HANDLER(8)
-DEF_HANDLER(9)
-DEF_HANDLER(10)
-DEF_HANDLER(11)
-DEF_HANDLER(12)
-DEF_HANDLER(13)
-DEF_HANDLER(14)
-DEF_HANDLER(15)
-DEF_HANDLER(16)
-DEF_HANDLER(17)
-DEF_HANDLER(18)
-DEF_HANDLER(19)
-DEF_HANDLER(20)
-DEF_HANDLER(21)
-DEF_HANDLER(22)
-DEF_HANDLER(23)
-DEF_HANDLER(24)
-DEF_HANDLER(25)
-DEF_HANDLER(26)
-DEF_HANDLER(27)
-DEF_HANDLER(28)
-DEF_HANDLER(29)
-DEF_HANDLER(30)
-DEF_HANDLER(31)
-DEF_HANDLER(32)
-DEF_HANDLER(33)
-DEF_HANDLER(34)
-DEF_HANDLER(35)
-DEF_HANDLER(36)
-DEF_HANDLER(37)
-DEF_HANDLER(38)
-DEF_HANDLER(39)
-DEF_HANDLER(40)
-DEF_HANDLER(41)
-DEF_HANDLER(42)
-DEF_HANDLER(43)
-DEF_HANDLER(44)
-DEF_HANDLER(45)
-DEF_HANDLER(46)
-DEF_HANDLER(47)
-DEF_HANDLER(48)
-DEF_HANDLER(49)
-DEF_HANDLER(50)
-DEF_HANDLER(51)
-DEF_HANDLER(52)
-DEF_HANDLER(53)
-DEF_HANDLER(54)
-DEF_HANDLER(55)
-DEF_HANDLER(56)
-DEF_HANDLER(57)
-DEF_HANDLER(58)
-DEF_HANDLER(59)
-DEF_HANDLER(60)
-DEF_HANDLER(61)
-DEF_HANDLER(62)
-DEF_HANDLER(63)
-DEF_HANDLER(64)
-DEF_HANDLER(65)
-DEF_HANDLER(66)
-DEF_HANDLER(67)
-DEF_HANDLER(68)
-DEF_HANDLER(69)
-DEF_HANDLER(70)
-DEF_HANDLER(71)
-DEF_HANDLER(72)
-DEF_HANDLER(73)
-DEF_HANDLER(74)
-DEF_HANDLER(75)
-DEF_HANDLER(76)
-DEF_HANDLER(77)
-DEF_HANDLER(78)
-DEF_HANDLER(79)
-DEF_HANDLER(80)
-DEF_HANDLER(81)
-DEF_HANDLER(82)
-DEF_HANDLER(83)
-DEF_HANDLER(84)
-DEF_HANDLER(85)
-DEF_HANDLER(86)
-DEF_HANDLER(87)
-DEF_HANDLER(88)
-DEF_HANDLER(89)
-DEF_HANDLER(90)
-DEF_HANDLER(91)
-DEF_HANDLER(92)
-DEF_HANDLER(93)
-DEF_HANDLER(94)
-DEF_HANDLER(95)
-DEF_HANDLER(96)
-DEF_HANDLER(97)
-
-const void* vectors[] __attribute__((section(".vectors"))) = {
-    (void*)0x2000c000, /* Top of stack at top of sram1. 48k */
-    init,              /* Reset handler */
-    unhandled_isr_1,     /* NMI */
-    unhandled_isr_2,     /* Hard Fault */
-    unhandled_isr_3,     /* MemManage */
-    unhandled_isr_4,     /* BusFault  */
-    unhandled_isr_5,     /* UsageFault */
-    unhandled_isr_6,     /* Reserved */
-    unhandled_isr_7,     /* Reserved */
-    unhandled_isr_8,     /* Reserved */
-    unhandled_isr_9,     /* Reserved */
-    unhandled_isr_10,     /* SVCall */
-    unhandled_isr_11,     /* Debug */
-    unhandled_isr_12,     /* Reserved */
-    unhandled_isr_13,     /* PendSV */
-    unhandled_isr_14,     /* SysTick */
-
-    /* External interrupt handlers follow */
-    unhandled_isr_15, /* 0 WWDG */
-    unhandled_isr_16, /* 1 PVD */
-    unhandled_isr_17, /* 2 TAMP_SAMP */
-    unhandled_isr_18, /* 3 RTC_WKUP */
-    unhandled_isr_19, /* 4 FLASH */
-    unhandled_isr_20, /* 5 RCC */
-    unhandled_isr_21, /* 6 EXTI0 */
-    unhandled_isr_22, /* 7 EXTI1 */
-    unhandled_isr_23, /* 8 EXTI2 */
-    unhandled_isr_24, /* 9 EXTI3 */
-    unhandled_isr_25, /* 10 EXTI4 */
-    unhandled_isr_26, /* 11 DMA_CH1 */
-    unhandled_isr_27, /* 12 DMA_CH2 */
-    unhandled_isr_28, /* 13 DMA_CH3 */
-    unhandled_isr_29, /* 14 DMA_CH4 */
-    unhandled_isr_30, /* 15 DMA_CH5 */
-    unhandled_isr_31, /* 16 DMA_CH6 */
-    unhandled_isr_32, /* 17 DMA_CH7 */
-    unhandled_isr_33, /* 18 ADC1 */
-    unhandled_isr_34, /* 19 CAN_TX */
-    unhandled_isr_35, /* 20 CAN_RX0 */
-    unhandled_isr_36, /* 21 CAN_RX1 */
-    unhandled_isr_37, /* 22 CAN_SCE */
-    unhandled_isr_38, /* 23 EXTI9_5 */
-    unhandled_isr_39, /* 24 TIM1_BRK/TIM15 */
-    unhandled_isr_40, /* 25 TIM1_UP/TIM16 */
-    unhandled_isr_41, /* 26 TIM1_TRG_COM */
-    unhandled_isr_42, /* 27 TIM1_CC */
-    unhandled_isr_43, /* 28 TIM2 */
-    unhandled_isr_44, /* 29 Reserved */
-    unhandled_isr_45, /* 30 Reserved */
-    unhandled_isr_46, /* 31 I2C1_EV */
-    unhandled_isr_47, /* 32 I2C1_ER */
-    unhandled_isr_48, /* 33 I2C2_EV */
-    unhandled_isr_49, /* 34 I2C2_ER */
-    unhandled_isr_50, /* 35 SPI1 */
-    unhandled_isr_51, /* 36 SPI2 */
-    unhandled_isr_52, /* 37 USART1 */
-    unhandled_isr_53, /* 38 USART2 */
-    unhandled_isr_54, /* 39 USART3 */
-    unhandled_isr_55, /* 40 EXTI15_10 */
-    unhandled_isr_56, /* 41 RTCAlarm */
-    unhandled_isr_57, /* 42 Reserved */
-    unhandled_isr_58, /* 43 Reserved */
-    unhandled_isr_59, /* 44 Reserved */
-    unhandled_isr_60, /* 45 Reserved */
-    unhandled_isr_61, /* 46 Reserved */
-    unhandled_isr_62, /* 47 Reserved */
-    unhandled_isr_63, /* 48 Reserved */
-    unhandled_isr_64, /* 49 SDMMC1 */
-    unhandled_isr_65, /* 50 Reserved */
-    unhandled_isr_66, /* 51 SPI3 */
-    unhandled_isr_67, /* 52 Reserved */
-    unhandled_isr_68, /* 53 Reserved */
-    unhandled_isr_69, /* 54 TIM6_DACUNDER */
-    unhandled_isr_70, /* 55 TIM7 */
-    unhandled_isr_71, /* 56 DMA2_CH1 */
-    unhandled_isr_72, /* 57 DMA2_CH2 */
-    unhandled_isr_73, /* 58 DMA2_CH3 */
-    unhandled_isr_74, /* 59 DMA2_CH4 */
-    unhandled_isr_75, /* 60 DMA2_CH5 */
-    unhandled_isr_76, /* 61 Reserved */
-    unhandled_isr_77, /* 62 Reserved */
-    unhandled_isr_78, /* 63 Reserved*/
-    unhandled_isr_79, /* 64 COMP */
-    unhandled_isr_80, /* 65 LPTIM1 */
-    unhandled_isr_81, /* 66 LPTIM2 */
-    unhandled_isr_82, /* 67 USB_FS */
-    unhandled_isr_83, /* 68 DMA_CH6 */
-    unhandled_isr_84, /* 69 DMA_CH7 */
-    unhandled_isr_85, /* 70 LPUART1 */
-    unhandled_isr_86, /* 71 QUADSPI */
-    unhandled_isr_87, /* 72 I2C3_EV */
-    unhandled_isr_88, /* 73 I2C3_ER */
-    unhandled_isr_89, /* 74 SAI1 */
-    unhandled_isr_90, /* 75 Reserved */
-    unhandled_isr_91, /* 76 SWPMI1 */
-    unhandled_isr_92, /* 77 TSC */
-    unhandled_isr_93, /* 78 Reserved */
-    unhandled_isr_94, /* 79 AES */
-    unhandled_isr_95, /* 80 RNG */
-    unhandled_isr_96, /* 81 FPU */
-    unhandled_isr_97  /* 82 CRS */
-};
-
-
-/*
- * Does nothing ... forever.
- */
-void unhandled_isr(int isr)
-{
-  __IO gpio_port_t* port_b = enable_gpio(GPIO_PORT_B);
-  gpio_output_pin_t pin3 = set_gpio_pin_output(port_b, PIN_3);
-
-  if (is_usart2_enabled()) {
-    usart_printf(&USART2, "** Unhandled ISR Vector [%d]\r\n", isr);
-  }
-
-  for (;;) {
-    /* Flash in a distinct pattern to know that something went wrong. */
-
-    pin_off(pin3);
-    delay(1000000);
-    pin_on(pin3);
-    delay(1000000);
-    pin_off(pin3);
-    delay(1000000);
-    pin_on(pin3);
-    delay(5000000);
-  }
-}
diff --git a/03-refactor/src/main.c b/03-refactor/src/main.c
deleted file mode 100644
index 97449b2..0000000
--- a/03-refactor/src/main.c
+++ /dev/null
@@ -1,103 +0,0 @@
-
-#include "clock.h"
-#include "delay.h"
-#include "gpio.h"
-#include "spin.h"
-#include "usart.h"
-#include "sio.h"
-
-void unhandled_isr_2();
-void init();
-
-int in_the_data;
-volatile uint32_t delay_amt = 20000000 / 4;
-
-int enable_usart1(uint32_t baud_rate)
-{
-  /* Enable the GPIO bus. */
-  __IO gpio_port_t* port_b = enable_gpio(GPIO_PORT_B);
-
-  /* Enable the USART clock. */
-  RCC.apb2en_r |= BIT(14);
-
-  /* == Configure the IO Pins. == */
-
-  /* GPIO D5 (Port B pin 6) is USART1 Tx,
-   * GPIO D6 (Port B pin 7) is USART1 Rx. */
-  set_gpio_pin_mode(port_b, PIN_6, MODE_ALTERNATE);
-  set_gpio_pin_mode(port_b, PIN_7, MODE_ALTERNATE);
-
-  /* Set the GPIO pins to use the USART alternate function. */
-  set_gpio_alternate_function(port_b, PIN_6, AFN_7);
-  set_gpio_alternate_function(port_b, PIN_7, AFN_7);
-
-  RCC.apb2rst_r &= ~BIT(14); /* De-assert reset of USART1 */
-
-  uint32_t baud_rate_div = 80000000 / baud_rate;
-  USART1.c1.r = 0;
-  USART1.c2.r = 0;
-  USART1.c3.r = 0;
-  USART1.br.v = baud_rate_div;
-
-  USART1.c1.r |= BIT(3) | BIT(2);
-  USART1.c1.r |= BIT(0);
-
-  /* Enable the transmitter and the receiver. */
-  usart_set_enabled(&USART1, USART_ENABLE_TX);
-  asm volatile(" cpsie i ");
-}
-
-void dwn() {
-  int val = 19;
-
-  while (val > 1) {
-    usart_printf(&USART2, "Value: %2d\r\n", val);
-    if ((val & 1) == 0) {
-      val /= 2;
-    } else {
-      val = val * 3 + 1;
-    }
-  }
-  usart_printf(&USART2, "Value: %2d\r\n", val);
-}
-
-/* Main function. This gets executed from the interrupt vector defined above. */
-int main()
-{
-  /* Enable the GPIO port B. */
-  // __IO gpio_port_t* port_b = enable_gpio(GPIO_PORT_B);
-  // gpio_output_pin_t pin3 = set_gpio_pin_output(port_b, PIN_3);
-  // gpio_output_pin_t pin1 = set_gpio_pin_output(port_b, PIN_1);
-
-  /* Enable a higher clock frequency. */
-  set_system_clock_MHz(80);
-
-  enable_usart2(115200);
-  int on_the_stack;
-
-  USART2.c1.tcie = 1;
-  USART2.c1.txeie = 1;
-
-  // pin_on(pin3);
-  if (is_usart2_enabled()) {
-    dwn();
-    usart_printf(&USART2, "Hello, %d!\r\n", -15);
-    usart_printf(&USART2, "Hello, %022x\r\n", 0xeadbeef);
-    usart_printf(&USART2, "on_the_stack: %08X\r\n", (unsigned) &on_the_stack);
-
-    int i;
-
-    printf("isr-2: %08x\r\n", (unsigned int)(void *) unhandled_isr_2);
-    printf("init: %08x\r\n", (unsigned int)(void *) init);
-    for (i = 0; i < 20; ++ i) {
-      printf("isr %d: %08x\r\n", i, *(unsigned int*)(0x08000000 + i * 4));
-    }
-  }
-
-  // usart_printf(&USART2, "that_thing: %d\n", *(unsigned*)(0x0));
-  // for(;;);
-}
-
-void do_thing(void(*fn)()) {
-  fn();
-}
diff --git a/03-refactor/src/printf.c b/03-refactor/src/printf.c
deleted file mode 100644
index fa7f519..0000000
--- a/03-refactor/src/printf.c
+++ /dev/null
@@ -1,152 +0,0 @@
-#include "printf.h"
-
-enum PRINTF_TYPE {
-  PRINTF_TYPE_STRING = 0,
-  PRINTF_TYPE_INT = 1,
-  PRINTF_TYPE_PERCENT = 2,
-  PRINTF_TYPE_UNKNOWN = 999
-};
-
-static enum PRINTF_TYPE get_printf_type(const char* cur)
-{
-  while (*cur >= 0x30 && *cur < 0x3a) ++ cur;
-
-  if (*cur == 's') {
-    return PRINTF_TYPE_STRING;
-  } else if (*cur == 'd' || *cur == 'x' || *cur == 'X' || *cur == 'u') {
-    return PRINTF_TYPE_INT;
-  }
-
-  return PRINTF_TYPE_UNKNOWN;
-}
-
-static const char* printf_handle_string(
-  const char* fmt,
-  const char* next,
-  printf_callback_t callback,
-  volatile void* closure)
-{
-  const char* cur = next;
-  for (; *cur != 0; ++ cur) {
-    callback(closure, *cur);
-  }
-
-  return fmt;
-}
-
-static char printf_toupper(char ch)
-{
-  if (ch <= 0x7a && ch > 0x60) {
-    return ch - 0x20;
-  }
-  return ch;
-}
-
-static const char* parse_fmt(
-    const char* fmt,
-    int* out_padding,
-    char* out_pad_char)
-{
-  if (*fmt == '0') {
-    *out_pad_char = '0';
-    ++ fmt;
-  } else {
-    *out_pad_char = ' ';
-  }
-  int padding = 0;
-  while (*fmt < 0x3a && *fmt >= 0x30) {
-    padding *= 10;
-    padding += (*fmt ++) - 0x30;
-  }
-
-  *out_padding = padding;
-  return fmt;
-}
-
-static const char* mapping = "0123456789abcdef";
-static const char* printf_handle_int(
-  const char* fmt, unsigned int next, printf_callback_t callback, volatile void* closure)
-{
-  int base = 10;
-  char chars[32];
-  int pos = 31;
-  int upper = 0;
-  char pad_char;
-  int padding;
-  int is_unsigned = 0;
-
-  fmt = parse_fmt(fmt, &padding, &pad_char);
-
-  if (*fmt == 'x' || *fmt == 'X') {
-    base = 16;
-    is_unsigned = 1;
-  } else if (*fmt == 'u') {
-    is_unsigned = 1;
-  }
-
-  upper = *fmt == 'X';
-
-  int next_i = (int) next;
-  if (next_i < 0 && !is_unsigned) {
-    callback(closure, '-');
-    next_i *= -1;
-    next = (unsigned) next_i;
-  }
-
-  if (next == 0) {
-    callback(closure, '0');
-  } else {
-    while (next > 0) {
-      char next_ch = mapping[next % base];
-      if (upper) next_ch = printf_toupper(next_ch);
-      chars[pos --] = next_ch;
-      padding --;
-      next /= base;
-    }
-
-    while ((padding--) > 0) {
-      chars[pos --] = pad_char;
-    }
-
-    for (++ pos; pos < 32; ++ pos) {
-      callback(closure, chars[pos]);
-    }
-  }
-
-  return fmt;
-}
-
-void printf_format(
-    const char* fmt,
-    printf_callback_t callback,
-    volatile void* closure,
-    va_list ap) 
-{
-  const char* cur = fmt;
-
-  const char* next_string;
-  int next_int;
-
-  for (; *cur != 0; ++ cur) {
-    if (*cur == '%') {
-      // Handle the formatting here.
-      ++ cur;
-      enum PRINTF_TYPE printf_type = get_printf_type(cur);
-
-      switch (printf_type) {
-      case PRINTF_TYPE_PERCENT:
-        callback(closure, '%');
-        break;
-      case PRINTF_TYPE_STRING:
-        next_string = va_arg(ap, const char*);
-        cur = printf_handle_string(cur, next_string, callback, closure);
-        break;
-      case PRINTF_TYPE_INT:
-        next_int = va_arg(ap, int);
-        cur = printf_handle_int(cur, next_int, callback, closure);
-      }
-    } else {
-      callback(closure, *cur);
-    }
-  }
-}
diff --git a/03-refactor/src/spin.c b/03-refactor/src/spin.c
deleted file mode 100644
index fbd16b6..0000000
--- a/03-refactor/src/spin.c
+++ /dev/null
@@ -1,49 +0,0 @@
-#include "spin.h"
-#include "delay.h"
-#include "gpio.h"
-
-#define SHORT_DELAY 200000
-#define LONG_DELAY (SHORT_DELAY * 2)
-
-static void flash_bit(
-    uint32_t base, gpio_output_pin_t out_pin,
-    uint8_t bit /* 0 => 0, non-zero => 1 */)
-{
-  pin_on(out_pin);
-  if (bit) {
-    delay(base * 2);
-  } else {
-    delay(base);
-  }
-  pin_off(out_pin);
-  delay(base);
-}
-
-void spin(uint32_t base, uint8_t c)
-{
-  uint8_t code;
-  __IO gpio_port_t* port_b = enable_gpio(GPIO_PORT_B);
-  gpio_output_pin_t pin3 = set_gpio_pin_output(port_b, PIN_3);
-
-  for (;;) {
-    code = c;
-    flash_bit(base, pin3, code & 0x80);
-    code <<= 1;
-    flash_bit(base, pin3, code & 0x80);
-    code <<= 1;
-    flash_bit(base, pin3, code & 0x80);
-    code <<= 1;
-    flash_bit(base, pin3, code & 0x80);
-
-    code <<= 1;
-    flash_bit(base, pin3, code & 0x80);
-    code <<= 1;
-    flash_bit(base, pin3, code & 0x80);
-    code <<= 1;
-    flash_bit(base, pin3, code & 0x80);
-    code <<= 1;
-    flash_bit(base, pin3, code & 0x80);
-
-    delay(base * 4);
-  }
-}
diff --git a/03-refactor/src/usart.c b/03-refactor/src/usart.c
deleted file mode 100644
index 76e93f1..0000000
--- a/03-refactor/src/usart.c
+++ /dev/null
@@ -1,131 +0,0 @@
-#include "usart.h"
-#include "delay.h"
-#include "printf.h"
-#include "gpio.h"
-#include "clock.h"
-
-void set_usart1_clock_src(__IO rcc_t* rcc, usart_clk_src_t usart_clk_src)
-{
-  rcc->ccip_r = rcc->ccip_r & (~0x03) | usart_clk_src;
-}
-
-void set_usart2_clock_src(__IO rcc_t* rcc, usart_clk_src_t usart_clk_src)
-{
-  rcc->ccip_r = rcc->ccip_r & ~(0x03 << 2) | (usart_clk_src << 2);
-}
-
-void set_usart2_clock_enabled(__IO rcc_t* rcc, bool enable)
-{
-  if (enable) {
-    rcc->apb1en1_r |= BIT(17);
-  } else {
-    rcc->apb1en1_r &= ~BIT(17);
-  }
-}
-
-void set_usart1_clock_enabled(__IO rcc_t* rcc, bool enable)
-{
-  if (enable) {
-    rcc->apb2en_r |= BIT(14);
-  } else {
-    rcc->apb2en_r &= ~BIT(14);
-  }
-}
-
-void usart_set_parity(__IO usart_t* usart, usart_parity_t parity)
-{
-  usart->c1.pce = !!parity;
-  usart->c1.ps  = parity & 1;
-}
-
-void usart_set_enabled(__IO usart_t* usart, usart_enable_t enabled)
-{
-  if (!enabled) {
-    usart->c1.ue = 0;
-  } else {
-    /* Set the rx enabled. */
-    union USART_CR1 tmp = usart->c1;
-
-    tmp.re = !!(enabled & USART_ENABLE_RX);
-    tmp.te = !!(enabled & USART_ENABLE_TX);
-    tmp.ue = 1;
-
-    usart->c1 = tmp;
-  }
-}
-
-void usart_transmit_byte(__IO usart_t* usart, uint8_t byte)
-{
-  usart->td_r = byte;
-  /* Per the manual, when bit 7 of the IS register is set, then the usart
-   * data has been sent to the shift register.
-   *
-   * This bit is cleared by writing to the TD register. */
-  while (!(usart->is_r & BIT(7)))
-    ;
-}
-
-void usart_transmit_bytes(__IO usart_t* usart, const uint8_t* bytes, uint32_t n)
-{
-  while (n --) {
-    usart_transmit_byte(usart, *(bytes ++));
-  }
-}
-
-void usart_transmit_str(__IO usart_t* usart, const char* str)
-{
-  while (*str) {
-    if (*str == '\n') {
-      usart_transmit_byte(usart, '\r');
-    }
-    usart_transmit_byte(usart, *(str ++));
-  }
-}
-
-void usart_printf(__IO usart_t* usart, const char* fmt, ...)
-{
-  printf_callback_t callback = (printf_callback_t) usart_transmit_byte;
-  volatile void* closure = usart;
-  va_list ap; 
-  va_start(ap, fmt);
-  printf_format(fmt, callback, closure, ap);
-  va_end(ap);
-}
-
-int usart2_enabled = 0;
-int is_usart2_enabled() {
-  return usart2_enabled;
-}
-
-int enable_usart2(uint32_t baud_rate)
-{
-  __IO gpio_port_t* port_a = enable_gpio(GPIO_PORT_A);
-  enable_hsi(&RCC, true);
-
-  // Turn on the clock for the USART2 peripheral
-  set_usart2_clock_src(&RCC, USART_CLK_SRC_HSI16);
-  set_usart2_clock_enabled(&RCC, true);
-
-  // Configure the I/O pins.  Will use PA2 as TX and PA15 as RX so setup for
-  // alternate function
-  set_gpio_pin_mode(port_a, PIN_2, MODE_ALTERNATE);
-  set_gpio_pin_mode(port_a, PIN_15, MODE_ALTERNATE);
-  set_gpio_alternate_function(port_a, PIN_2, AFN_7);
-  set_gpio_alternate_function(port_a, PIN_15, AFN_3);
-
-  // De-assert reset of USART2
-  RCC.apb1rst1_r &= ~BIT(17);
-
-  // Configure the USART
-  // disable USART first to allow setting of other control bits
-  // This also disables parity checking and enables 16 times oversampling
-
-  USART2.c1.r = 0;
-  USART2.c2.r = 0;
-  USART2.c3.r = 0;
-
-  usart_set_divisor(&USART2, 16000000 / baud_rate);
-  usart_set_enabled(&USART2, USART_ENABLE_TX | USART_ENABLE_RX);
-
-  usart2_enabled = 1;
-}
diff --git a/03-refactor/src/vector.c b/03-refactor/src/vector.c
deleted file mode 100644
index e69de29..0000000
--- a/03-refactor/src/vector.c
+++ /dev/null