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-rw-r--r--include/kern/common.h50
-rw-r--r--include/kern/delay.h12
-rw-r--r--include/kern/dma/dma_manager.h279
-rw-r--r--include/kern/gpio/gpio_manager.h187
-rw-r--r--include/kern/gpio/sysled.h11
-rw-r--r--include/kern/init.h67
-rw-r--r--include/kern/lib.h10
-rw-r--r--include/kern/log.h12
-rw-r--r--include/kern/mem.h32
-rw-r--r--include/kern/string.h6
10 files changed, 666 insertions, 0 deletions
diff --git a/include/kern/common.h b/include/kern/common.h
new file mode 100644
index 0000000..653279e
--- /dev/null
+++ b/include/kern/common.h
@@ -0,0 +1,50 @@
+#ifndef COMMON__H
+#define COMMON__H
+
+#include <stdint.h>
+#include <stddef.h>
+#include <assert.h>
+
+#define WEAK __attribute__((weak))
+#define NORETURN __attribute__((noreturn))
+
+#ifndef static_assert
+#define static_assert(a, b)
+#endif
+
+/* Define __IO to be volatile if it's not already. */
+#ifndef __IO
+#define __IO volatile
+#endif
+
+#define CTZ(n) __builtin_ctz(n)
+
+#define bool int
+#ifndef __cplusplus
+#define true 1
+#define false 0
+#endif
+
+#define PACKED __attribute__((packed))
+#define BIT(n) (1 << (n))
+
+#define RESERVED_CONCAT_IMPL(x, y) x ## y
+#define RESERVED_MACRO_CONCAT(x, y) RESERVED_CONCAT_IMPL(x, y)
+#define RESERVED(n) \
+ bits_t RESERVED_MACRO_CONCAT(_r, __COUNTER__) :n
+
+#define RESERVE(type) \
+ __IO type RESERVED_MACRO_CONCAT(_r, __COUNTER__)
+
+#define ptr2reg(ptr) \
+ ((uint32_t) (ptrdiff_t) (ptr))
+
+typedef __IO uint32_t bits_t;
+
+#define regset(reg, mask, val) \
+ ((reg) = ((reg) & ~mask) | (val << CTZ(mask)))
+
+#define regget(reg, mask) \
+ (((reg) & mask) >> (CTZ(mask)))
+
+#endif /* COMMON_H */
diff --git a/include/kern/delay.h b/include/kern/delay.h
new file mode 100644
index 0000000..65a26d6
--- /dev/null
+++ b/include/kern/delay.h
@@ -0,0 +1,12 @@
+#ifndef H__DELAY__
+#define H__DELAY__
+
+#include <stdint.h>
+
+/*
+ * Loops and count-downs the delay, the time this takes depends on the speed
+ * of the clock.
+ */
+void delay(uint32_t delay);
+
+#endif /* H__DELAY__ */
diff --git a/include/kern/dma/dma_manager.h b/include/kern/dma/dma_manager.h
new file mode 100644
index 0000000..0d17bd5
--- /dev/null
+++ b/include/kern/dma/dma_manager.h
@@ -0,0 +1,279 @@
+#ifndef PERI_DMA_H_
+#define PERI_DMA_H_
+
+#include "kern/common.h"
+#include "arch/stm32l4xxx/peripherals/dma.h" /* Access to the DMA registers. */
+#include "arch/stm32l4xxx/peripherals/irq.h"
+
+#define DMA_ERROR_CHANNEL_IN_USE 1
+
+#define CAT2(x, y) x ## y
+#define CAT1(v, c) CAT2(v, c)
+#define DMA_RESERVED(dma) CAT1(dma ## _PERIPH_RESERVED, __COUNTER__)
+
+#define ALTERNATE0 0x0000
+#define ALTERNATE1 0x0100
+#define ALTERNATE2 0x0200
+#define ALTERNATE3 0x0300
+
+#define DMA_N_CHANNELS 7
+typedef enum {
+ DMA1_PERIPH_ADC1 = 0,
+ DMA1_PERIPH_ADC2 = 1,
+ DMA1_PERIPH_ADC3 = 2,
+ DMA1_PERIPH_DFSDM1_FLT0 = 3,
+ DMA1_PERIPH_DFSDM1_FLT1 = 4,
+ DMA1_PERIPH_DFSDM1_FLT2 = 5,
+ DMA1_PERIPH_DFSDM1_FLT3 = 6,
+
+ DMA_RESERVED(DMA1) = 7,
+ DMA1_PERIPH_SPI1_RX = 8,
+ DMA1_PERIPH_SPI1_TX = 9,
+ DMA1_PERIPH_SPI2_RX = 10,
+ DMA1_PERIPH_SPI2_TX = 11,
+ DMA1_PERIPH_SAI2_A = 12,
+ DMA1_PERIPH_SAI2_B = 13,
+
+ DMA_RESERVED(DMA1) = 14,
+ DMA1_PERIPH_USART3_TX = 15,
+ DMA1_PERIPH_USART3_RX = 16,
+ DMA1_PERIPH_USART1_TX = 17,
+ DMA1_PERIPH_USART1_RX = 18,
+ DMA1_PERIPH_USART2_RX = 19,
+ DMA1_PERIPH_USART2_TX = 20,
+
+ DMA_RESERVED(DMA1) = 21,
+ DMA1_PERIPH_I2C3_TX = 22,
+ DMA1_PERIPH_I2C3_RX = 23,
+ DMA1_PERIPH_I2C2_TX = 24,
+ DMA1_PERIPH_I2C2_RX = 25,
+ DMA1_PERIPH_I2C1_TX = 26,
+ DMA1_PERIPH_I2C1_RX = 27,
+
+ DMA1_PERIPH_TIM2_CH3 = 28,
+ DMA1_PERIPH_TIM2_UP = 29,
+ DMA1_PERIPH_TIM16_CH1_1 = 30 | ALTERNATE0,
+ DMA1_PERIPH_TIM16_UP_1 = 30 | ALTERNATE1, /* Same as TIM16_CH1. */
+ DMA_RESERVED(DMA1) = 31,
+ DMA1_PERIPH_TIM2_CH1 = 32,
+ DMA1_PERIPH_TIM16_CH1_2 = 33,
+ DMA1_PERIPH_TIM16_UP_2 = 33 | ALTERNATE1, /* Same as TIM16_CH1. */
+ DMA1_PERIPH_TIM2_CH2 = 34,
+ DMA1_PERIPH_TIM2_CH4 = 34 | ALTERNATE1, /* Same as TIM2_CH2. */
+
+
+ DMA1_PERIPH_TIM17_CH1_1 = 35,
+ DMA1_PERIPH_TIM17_UP_1 = 35 | ALTERNATE1, /* Same as TIM17_CH1 */
+ DMA1_PERIPH_TIM3_CH3 = 36,
+ DMA1_PERIPH_TIM3_CH4 = 37,
+ DMA1_PERIPH_TIM3_UP = 37 | ALTERNATE1, /* Same as TIM3_CH4 */
+ DMA1_PERIPH_TIM7_UP = 38,
+ DMA1_PERIPH_DAC_CH2 = 38 | ALTERNATE1, /* Same as TIM7_UP */
+ DMA1_PERIPH_QUADSPI = 39,
+ DMA1_PERIPH_TIM3_CH1 = 40,
+ DMA1_PERIPH_TIM3_TRIG = 40 | ALTERNATE1, /* Same as TIM3_CH1 */
+ DMA1_PERIPH_TIM17_CH1_2 = 41,
+ DMA1_PERIPH_TIM17_UP_2 = 41 | ALTERNATE1, /* Same as TIM17_CH1 */
+
+ DMA1_PERIPH_TIM4_CH1 = 42,
+ DMA_RESERVED(DMA1) = 43,
+ DMA1_PERIPH_TIM6_UP = 44,
+ DMA1_PERIPH_DAC_CH1 = 44 | ALTERNATE1, /* Same as TIM6_UP */
+ DMA1_PERIPH_TIM4_CH2 = 45,
+ DMA1_PERIPH_TIM4_CH3 = 46,
+ DMA_RESERVED(DMA1) = 47,
+ DMA1_PERIPH_TIM4_UP = 48,
+
+ DMA_DMA1_PERIHP_RESERVED5 = 49,
+ DMA1_PERIPH_TIM1_CH1 = 50,
+ DMA1_PERIPH_TIM1_CH2 = 51,
+ DMA1_PERIPH_TIM1_CH4 = 52,
+ DMA1_PERIPH_TIM1_TRIG = 52 | ALTERNATE1, /* Same as TIM1_TRIG */
+ DMA1_PERIPH_TIM1_COM = 52 | ALTERNATE2, /* Same as TIM1_TRIG */
+ DMA1_PERIPH_TIM15_CH1 = 53,
+ DMA1_PERIPH_TIM15_UP = 53 | ALTERNATE1, /* Same as TIM15_CH1 */
+ DMA1_PERIPH_TIM15_TRIG = 53 | ALTERNATE2, /* Same as TIM15_CH1 */
+ DMA1_PERIPH_TIM15_COM = 53 | ALTERNATE3, /* Same as TIM15_CH1 */
+ DMA1_PERIPH_TIM1_UP = 54,
+ DMA1_PERIPH_TIM1_CH3 = 55,
+
+ DMA2_DMA1_SWITCH__ = 56,
+
+ DMA2_PERIPH_I2C4_RX = 56,
+ DMA2_PERIPH_I2C4_TX = 57,
+ DMA2_PERIPH_ADC1 = 58,
+ DMA2_PERIPH_ADC2 = 59,
+ DMA2_PERIPH_ADC3 = 60,
+ DMA2_PERIPH_DCMI_1 = 61,
+ DMA_RESERVED(DMA2) = 62,
+
+ DMA2_PERIPH_SAI1_A_1 = 63,
+ DMA2_PERIPH_SAI1_B_1 = 64,
+ DMA2_PERIPH_SAI2_A = 65,
+ DMA2_PERIPH_SAI2_B = 66,
+ DMA_RESERVED(DMA2) = 67,
+ DMA2_PERIPH_SAI1_A_2 = 68,
+ DMA2_PERIPH_SAI1_B_2 = 69,
+
+ DMA2_PERIPH_UART5_TX = 70,
+ DMA2_PERIPH_UART5_RX = 71,
+ DMA2_PERIPH_UART4_TX = 72,
+ DMA_RESERVED(DMA2) = 73,
+ DMA2_PERIPH_UART4_RX = 74,
+ DMA2_PERIPH_USART1_TX = 75,
+ DMA2_PERIPH_USART1_RX = 76,
+
+ DMA2_PERIPH_SPI3_RX = 77,
+ DMA2_PERIPH_SPI3_TX = 78,
+ DMA_RESERVED(DMA2) = 79,
+ DMA2_PERIPH_TIM6_UP = 80,
+ DMA2_PERIPH_DAC_CH1 = 80 | ALTERNATE1, /* Same as TIM6_UP */
+ DMA2_PERIPH_TIM7_UP = 81,
+ DMA2_PERIPH_DAC_CH2 = 81 | ALTERNATE1, /* Same as TIM7_UP */
+ DMA_RESERVED(DMA2) = 82,
+ DMA2_PERIPH_QUADSPI = 83,
+
+ DMA2_PERIPH_SWPMI1_RX = 84,
+ DMA2_PERIPH_SWPMI1_TX = 85,
+ DMA2_PERIPH_SPI1_RX = 86,
+ DMA2_PERIPH_SPI1_TX = 87,
+ DMA2_PERIPH_DCMI_2 = 88,
+ DMA2_PERIPH_LPUART1_TX = 89,
+ DMA2_PERIPH_LPUART1_RX = 90,
+
+
+ DMA2_PERIPH_TIM5_CH4 = 91,
+ DMA2_PERIPH_TIM5_TRIG = 91 | ALTERNATE1, /* Same as TIM5_CH4 */
+ DMA2_PERIPH_TIM5_CH3 = 92,
+ DMA2_PERIPH_TIM5_UP = 92 | ALTERNATE1, /* Same as TIM5_CH3 */
+ DMA_RESERVED(DMA2) = 93,
+ DMA2_PERIPH_TIM5_CH2 = 94,
+ DMA2_PERIPH_TIM5_CH1 = 95,
+ DMA2_PERIPH_I2C1_RX = 96,
+ DMA2_PERIPH_I2C1_TX = 97,
+
+ DMA2_PERIPH_AES_IN_1 = 98,
+ DMA2_PERIPH_AES_OUT_1 = 99,
+ DMA2_PERIPH_AES_OUT_2 = 100,
+ DMA_RESERVED(DMA2) = 101,
+ DMA2_PERIPH_AES_IN_2 = 102,
+ DMA_RESERVED(DMA2) = 103,
+ DMA2_PERIPH_HASH_IN = 104,
+
+ DMA2_PERIPH_TIM8_CH3 = 105,
+ DMA2_PERIPH_TIM8_UP = 105 | ALTERNATE1, /* Same as TIM8_CH3 */
+ DMA2_PERIPH_TIM8_CH4 = 106,
+ DMA2_PERIPH_TIM8_TRIG = 106 | ALTERNATE1, /* Same as TIM8_CH4 */
+ DMA2_PERIPH_TIM8_COM = 106 | ALTERNATE2, /* Same as TIM8_CH4 */
+ DMA_RESERVED(DMA2) = 107,
+ DMA2_PERIPH_SDMMC1_1 = 108,
+ DMA2_PERIPH_SDMMC1_2 = 109,
+ DMA2_PERIPH_TIM8_CH1 = 110,
+ DMA2_PERIPH_TIM8_CH2 = 111,
+
+
+ DMA_PERIPH_SENTINEL,
+} dma_peripheral_t;
+
+
+/* Defines a DMA channel. */
+typedef struct {
+ uint8_t dma; /* 0 = DMA1, 1 = DMA2 */
+ uint8_t chan; /* 0 - 6 */
+} dma_channel_t;
+
+
+/*
+ * Defines a DMA channel allocated for memory-to-peripheral transfers. This
+ * structure is only nominally different from dma_channel_t in order to provide
+ * rudimentary type-checking.
+ */
+typedef struct {
+ dma_channel_t c_;
+} dma_mem2p_channel_t;
+
+/*
+ * Defines a DMA channel allocated for peripheral-to-memory transfers. This
+ * structure is only nominally different from dma_channel_t in order to provide
+ * rudimentary type-checking.
+ */
+typedef struct {
+ dma_channel_t c_;
+} dma_p2mem_channel_t;
+
+/* Defines a DMA channel allocated for mem2mem transfers.
+ * This structure is only nominally different from dma_channel_t
+ * in order to provide rudimentary type-checking.
+ */
+typedef struct {
+ dma_channel_t c_;
+} dma_mem2mem_channel_t;
+
+#define DMA_CHAN_ERROR ((dma_channel_t) { .dma = 0xff, .chan = 0xff })
+
+typedef struct {
+ bool transfer_complete_interrupt_enable;
+ bool half_transfer_interrupt_enable;
+ bool transfer_error_interrupt_enable;
+
+ bool circular_mode;
+ bool peripheral_increment;
+ bool memory_increment;
+
+ dma_size_t peripheral_block_size;
+ dma_size_t memory_block_size;
+
+ dma_priority_level_t priority;
+} dma_opts_t;
+
+#define DEFAULT_DMA_OPTS \
+ ((dma_opts_t) { .memory_increment = 1, \
+ .peripheral_increment = 0, \
+ .transfer_complete_interrupt_enable = 0, \
+ .half_transfer_interrupt_enable = 0, \
+ .transfer_error_interrupt_enable = 0, \
+ .circular_mode = 0, \
+ .peripheral_block_size = DMA_SIZE_8_BITS, \
+ .memory_block_size = DMA_SIZE_8_BITS, \
+ .priority = DMA_PRIORITY_LEVEL_MEDIUM })
+
+dma_p2mem_channel_t select_dma_channel_p2mem(
+ dma_peripheral_t peripheral,
+ dma_opts_t* opts_in,
+ int* error);
+
+dma_mem2p_channel_t select_dma_channel_mem2p(
+ dma_peripheral_t peripheral,
+ dma_opts_t* opts_in,
+ int* error);
+
+/* Returns a dma channel used for memory-to-memory transfers.
+ *
+ * channel - the channel this dma should use. The channel should
+ * be on the range [0-13]. The channels [0-6] refer to the 7 channels
+ * on DMA1, where channels [7-13] refer to the 7 channels on DMA2.
+ *
+ * If `channel` is -1, then the highest unused dma channel is selected.
+ */
+dma_mem2mem_channel_t select_dma_channel_mem2mem(
+ int channel,
+ dma_opts_t* opts,
+ int* error_out);
+
+void dma_mem2p_initiate_transfer(
+ dma_mem2p_channel_t chan, const void* from_loc, uint16_t nblocks);
+
+void dma_p2mem_initiate_transfer(
+ dma_p2mem_channel_t chan, void* to_loc, uint16_t nblocks);
+
+void dma_mem2mem_initiate_transfer(
+ dma_mem2mem_channel_t chan,
+ void* to_loc,
+ const void* from_loc,
+ uint16_t nblocks);
+
+void release_dma_channel(dma_channel_t chan);
+
+interrupt_t dma_channel_get_interrupt(dma_channel_t chan);
+
+#endif
diff --git a/include/kern/gpio/gpio_manager.h b/include/kern/gpio/gpio_manager.h
new file mode 100644
index 0000000..922a423
--- /dev/null
+++ b/include/kern/gpio/gpio_manager.h
@@ -0,0 +1,187 @@
+#ifndef KERN_GPIO_GPIO_MANAGE_H_
+#define KERN_GPIO_GPIO_MANAGE_H_
+
+#include "kern/common.h"
+#include "arch/stm32l4xxx/peripherals/gpio.h"
+
+#define GPIO_ERROR_IN_USE 1
+#define GPIO_ERROR_INVALID_PIN_FOR_ALTERNATE_FUNCTION 2
+#define GPIO_ERROR_INVALID_PIN 3
+
+typedef enum {
+/* Creates vaules GPIO_PIN_<port><num> i.e. GPIO_PIN_A0 */
+#define PORT(p, pn) \
+ GPIO_PIN_P ## p ## pn,
+#include "arch/stm32l4xxx/peripherals/tables/stm32l432xx/gpio/port_table.inc"
+#undef PORT
+
+ N_GPIO_PINS
+} gpio_pin_t;
+
+/* Alternate functions. */
+typedef enum {
+#define AFN(fn, ...) \
+ GPIO_ALTERNATE_FUNCTION_ ## fn,
+#include "arch/stm32l4xxx/peripherals/tables/stm32l432xx/gpio/afn_table.inc"
+#undef AFN
+ GPIO_ALTERNATE_FUNCTION_EVENTOUT,
+} gpio_alternate_function_t;
+
+#define gpio_pin_for_alternate_function(af) ((af) / 16)
+#define gpio_pin_out_of_range(pin) \
+ ((pin) < 0 || (pin) >= N_GPIO_PINS)
+
+typedef enum {
+ GPIO_PORT_A,
+ GPIO_PORT_B,
+ GPIO_PORT_C,
+ GPIO_PORT_D,
+ GPIO_PORT_E,
+ GPIO_PORT_F,
+ GPIO_PORT_G,
+ GPIO_PORT_H,
+ GPIO_PORT_I,
+
+ N_GPIO_PORTS,
+} gpio_port_t;
+
+typedef enum {
+ GPIO_MODE_INPUT,
+ GPIO_MODE_OUTPUT,
+ GPIO_MODE_ALTERNATE,
+ GPIO_MODE_ANALOG
+} gpio_mode_t;
+
+/*
+ * Enum defining the pin speeds that are possible.
+ */
+typedef enum {
+ SPEED_2MHZ = 0,
+ SPEED_10MHZ = 1,
+ SPEED_50MHZ = 3,
+} gpio_speed_t;
+
+typedef enum {
+ GPIO_OUTPUT_TYPE_PUSH_PULL,
+ GPIO_OUTPUT_TYPE_OPEN_DRAIN
+} gpio_output_type_t;
+
+typedef enum {
+ GPIO_OUTPUT_SPEED_LOW,
+ GPIO_OUTPUT_SPEED_MEDIUM,
+ GPIO_OUTPUT_SPEED_HIGH,
+ GPIO_OUTPUT_SPEED_VERY_HIGH,
+} gpio_output_speed_t;
+
+typedef enum {
+ GPIO_PULL_DIR_NONE,
+ GPIO_PULL_DIR_UP,
+ GPIO_PULL_DIR_DOWN,
+} gpio_pull_dir_t;
+
+/* Returns the appropriate gpio_port for the provided pin. */
+inline static gpio_port_t get_port_for_pin(gpio_pin_t pin)
+{
+ switch (pin) {
+#define PORT(p, pn) \
+ case GPIO_PIN_P ## p ## pn: return GPIO_PORT_ ## p;
+#include "arch/stm32l4xxx/peripherals/tables/stm32l432xx/gpio/port_table.inc"
+#undef PORT
+ case N_GPIO_PINS: return N_GPIO_PORTS;
+ }
+
+ /* Should be unreachable. */
+}
+
+#define DEFAULT_GPIO_OPTS_OUTPUT \
+ (gpio_pin_opts_t) { \
+ .mode = GPIO_MODE_OUTPUT, \
+ .pull_dir = GPIO_PULL_DIR_DOWN, \
+ .output_opts.speed = GPIO_OUTPUT_SPEED_MEDIUM, \
+ .output_opts.type = GPIO_OUTPUT_TYPE_PUSH_PULL, \
+ }
+
+#define DEFAULT_GPIO_OPTS_INPUT \
+ (gpio_pin_opts_t) { \
+ .mode = GPIO_MODE_OUTPUT, \
+ .pull_dir = GPIO_PULL_DIR_DOWN, \
+ }
+
+typedef struct {
+ gpio_mode_t mode;
+ gpio_pull_dir_t pull_dir;
+
+ union {
+ struct {
+ } input_opts;
+
+ struct {
+ gpio_output_speed_t speed;
+ gpio_output_type_t type;
+ } output_opts;
+
+ struct {
+ uint8_t function;
+ } alternate_opts;
+
+ struct {
+ } analog_opts;
+ };
+} gpio_pin_opts_t;
+
+/* Differentiates at compile-time from the a gpio_pin_t enum value and a pin
+ * that's been reserved. */
+typedef struct {
+ gpio_pin_t v_;
+} gpio_reserved_pin_t;
+
+/* Returns a pointer to the GPIO pin bus and offset. This is useful for when
+ * raw access to the values are needed. I.e. time critical applications. */
+void get_gpio_pin_port_off(
+ gpio_pin_t pin, gpio_port_config_t** out_cfg, int* out_off);
+
+/* Sets the given GPIO pin to high. */
+void set_gpio_pin_high(gpio_reserved_pin_t pin);
+
+/* Sets the given GPIO pin to low. */
+void set_gpio_pin_low(gpio_reserved_pin_t pin);
+
+/** returns true if a GPIO pin is in use. */
+bool gpio_pin_in_use(gpio_pin_t pin);
+
+/*
+ * Reserve the provided GPIO pin using the opts provided.
+ *
+ * sets error_out to GPIO_ERROR_IN_USE if the GPIO pin could not be reserved
+ * because it already has been reserved.
+ *
+ * The function will automatically enable the correct GPIO port bus.
+ */
+gpio_reserved_pin_t reserve_gpio_pin(
+ gpio_pin_t pin, gpio_pin_opts_t* opts, int* error_out);
+
+/* Enables and returns the pin reserved for the alternate function.
+ *
+ * If the `hint` parameter is defined (non -1) the manager will try
+ * to reserve that pin for the alternate function and fail if it can't.
+ *
+ * If `hint` is -1 then the first available pin for that alternate function
+ * will be reserved and returned.
+ *
+ *
+ */
+gpio_reserved_pin_t gpio_enable_alternate_function(
+ gpio_alternate_function_t fn,
+ gpio_pin_t hint,
+ int* error_out);
+
+/*
+ * Releases the GPIO pin so it can be reserved again in the future.
+ *
+ * The pin is reset during this process and if there are no more reserved pins
+ * on the corresponding port this function will disable the port. (last one out
+ * gets the lights.).
+ */
+void release_gpio_pin(gpio_reserved_pin_t gpio_pin);
+
+#endif /* KERN_GPIO_GPIO_MANAGE_H_ */
diff --git a/include/kern/gpio/sysled.h b/include/kern/gpio/sysled.h
new file mode 100644
index 0000000..b2c9056
--- /dev/null
+++ b/include/kern/gpio/sysled.h
@@ -0,0 +1,11 @@
+/*
+ * Headers for interacting and managing the system LED.
+ */
+#ifndef SYSLED_H_
+#define SYSLED_H_
+
+#include "kern/gpio/gpio_manager.h"
+
+gpio_reserved_pin_t get_sysled();
+
+#endif
diff --git a/include/kern/init.h b/include/kern/init.h
new file mode 100644
index 0000000..737b85f
--- /dev/null
+++ b/include/kern/init.h
@@ -0,0 +1,67 @@
+#ifndef INIT_H_
+#define INIT_H_
+
+/** Globals annotated with _no_init will not be set during init1 bootup
+ * where the data segement is loaded from flash and the bss segment is
+ * cleared.
+ *
+ * This is useful for routines that run in the init0 boot procedure
+ * that need persistent globals.
+ *
+ * Note that initializing a global annotated with _no_init will have
+ * no effect as the variable will remain uninitialized until explicitly
+ * set by by the program.
+ */
+#define _no_init \
+ __attribute((__section__(".noinit")))
+
+#define init0 \
+ static void init0fn(); \
+ static __attribute((__section__(".init0"))) \
+ __attribute((__used__)) \
+ void(*init0_ptr)() = init0fn; \
+ static void init0fn
+#define init1 \
+ static void init1fn(); \
+ static __attribute((__section__(".init1"))) \
+ __attribute((__used__)) \
+ void(*init1_ptr)() = init1fn; \
+ static void init1fn
+#define init2 \
+ static void init2fn(); \
+ static __attribute((__section__(".init2"))) \
+ __attribute((__used__)) \
+ void(*init2_ptr)() = init2fn; \
+ static void init2fn
+#define init3 \
+ static void init3fn(); \
+ static __attribute((__section__(".init3"))) \
+ __attribute((__used__)) \
+ void(*init3_ptr)() = init3fn; \
+ static void init3fn
+#define init4 \
+ static void init4fn(); \
+ static __attribute((__section__(".init4"))) \
+ __attribute((__used__)) \
+ void(*init4_ptr)() = init4fn; \
+ static void init4fn
+#define init5 \
+ static void init5fn(); \
+ static __attribute((__section__(".init5"))) \
+ __attribute((__used__)) \
+ void(*init5_ptr)() = init5fn; \
+ static void init5fn
+#define init6 \
+ static void init6fn(); \
+ static __attribute((__section__(".init6"))) \
+ __attribute((__used__)) \
+ void(*init6_ptr)() = init6fn; \
+ static void init6fn
+#define init7 \
+ static void init7fn(); \
+ static __attribute((__section__(".init7"))) \
+ __attribute((__used__)) \
+ void(*init7_ptr)() = init7fn; \
+ static void init7fn
+
+#endif /* INIT_H_ */
diff --git a/include/kern/lib.h b/include/kern/lib.h
new file mode 100644
index 0000000..be0e8e9
--- /dev/null
+++ b/include/kern/lib.h
@@ -0,0 +1,10 @@
+#ifndef LIB_H_
+#define LIB_H_
+
+#include <stdint.h>
+
+void hexify(uint32_t v, char* into);
+
+void decimalify(int v, char* into);
+
+#endif
diff --git a/include/kern/log.h b/include/kern/log.h
new file mode 100644
index 0000000..5e49def
--- /dev/null
+++ b/include/kern/log.h
@@ -0,0 +1,12 @@
+#ifndef LOG_H_
+#define LOG_H_
+
+/*
+ * Defines logging capabilities. This logging unit will enable logging on
+ * the systems main USART output.
+ */
+
+/** Similar to fprintf, but with a stripped-down format-string DSL. */
+void klogf(const char* fmt, ...);
+
+#endif
diff --git a/include/kern/mem.h b/include/kern/mem.h
new file mode 100644
index 0000000..c0999f5
--- /dev/null
+++ b/include/kern/mem.h
@@ -0,0 +1,32 @@
+#ifndef MEM_H_
+#define MEM_H_
+
+#include "arch.h"
+#include <stddef.h>
+
+#define DATA_SEGMENT_STOP_ADDR ((uint8_t*) &DATA_SEGMENT_STOP)
+#define DATA_SEGMENT_START_ADDR ((uint8_t*) &DATA_SEGMENT_START)
+
+#define MAX_HEAP_SIZE \
+ ((16384 - (DATA_SEGMENT_STOP_ADDR - DATA_SEGMENT_START_ADDR)) / 4 * 4)
+
+/* allocates memory on the head, which is stored in sram2 */
+void* halloc(size_t n);
+
+/* Frees the memory allocated by halloc. */
+void hfree(void* mem);
+
+#ifdef FOR_TESTING
+
+void* debug_halloc_get_next_ptr(void* ptr);
+
+void* debug_halloc_get_prev_ptr(void* ptr);
+
+int debug_halloc_assert_consistency(char* error, size_t len);
+
+void debug_print_blocks();
+
+#endif
+
+
+#endif
diff --git a/include/kern/string.h b/include/kern/string.h
new file mode 100644
index 0000000..3c9f0b4
--- /dev/null
+++ b/include/kern/string.h
@@ -0,0 +1,6 @@
+#ifndef STRING_H_
+#define STRING_H_
+
+void kstrcpy(char* into, const char* from);
+
+#endif /* STRING_H_ */